资源列表
[VHDL编程] TB_Read_Write_File_vhd
说明:Simplified VHDL testbench: Read/Write from/to Text File.<AhMahdi> 在 2025-04-07 上传 | 大小:1kb | 下载:0
[VHDL编程] mac_accumulator
说明:VHDL Multiplier Adder Accumulator together with Test Bench.<AhMahdi> 在 2025-04-07 上传 | 大小:1kb | 下载:0
[VHDL编程] AD4360config
说明:此代码是ADI公司的锁相频率合成芯片ADF4360配置程序,采用Verilog HDL语言编程,并且经过实验验证。-This code is ADI PLL frequency synthesizer chip ADF4360 configuration procedures, using Verilog HDL language programming, and after experimental verification.<蒋相> 在 2025-04-07 上传 | 大小:1kb | 下载:0
[VHDL编程] divider1-(3)
说明:Code for divider is written in Verilog where divider and dividend both are of 8 bits. Division is done using continuous subtraction method until the divisor becomes greater or equal to dividend.<bcd> 在 2025-04-07 上传 | 大小:1kb | 下载:0
[VHDL编程] convolution
说明:Source code for convolution of two complex number is written in Verilog language<bcd> 在 2025-04-07 上传 | 大小:1kb | 下载:0