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[VHDL编程] ComparatorTestVersion
说明:基於wire方式設計的補償器,但需外接DFF依照同學想做幾階的可在進行外加,Z^-1 需2個 Z^-2 3個依此類推.僅提供實做參考,實際參數需自行設計-Based on wire mode compensator design, but need to add DFF in accordance with the order of a few students want to be carrying plus, Z ^-1 need<王宇揚> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] counter60
说明:this a counter. it can count from 0 to 50-this is a counter. it can count from 0 to 50<Le Ngoc Tuan> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] ZIDONGDIANTIKONGZHI
说明:三层的电梯控制,具备显示,加速,以及开关门的延时等操作-Three elevator control, including a display, acceleration, and an operation switch gate delay and other<TOMJACK> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] FIFO_altera.v
说明:FIFO for Altera Cyclone II or Cyclone III on memory blocks. Length of FIFO can be changed.<gmind> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] divby4.5.v
说明:This Divider by 4.5.-This is Divider by 4.5.<Gourav Agarwal> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] lfsrupdwn.v
说明:This left shift register.-This is left shift register.<Gourav Agarwal> 在 2024-12-28 上传 | 大小:1kb | 下载:0
[VHDL编程] divby3.v
说明:This Divider by 3.-This is Divider by 3.<Gourav Agarwal> 在 2024-12-28 上传 | 大小:1kb | 下载:0