资源列表
[VHDL编程] infrared_receive
说明: 红外接收处理,根据外部波形记录波形的高低电平时间,从而得到波形数据。-Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.<l> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] code1
说明:实现50MHz时钟分频,点亮fpga开发板的led灯,并且让数码管动态显示电子计时-Implementation of 50MHz clock frequency, the LED lights FPGA development board, and make digital tube dynamic display of electronic timing<hanchangli> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] randomization
说明:伪随机序列应用设计:利用verilog代码实现伪随机信号的产生-Pseudo-random sequence application design: the use of pseudo-random signals verilog code generation<祖兴水> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] sw_debounce
说明:Lesson 9 BJ-EPM240学习板实验2——按键消抖实验-Key debounce<卢磊> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] ARITHMETIC
说明:算术乘法器,这是我自己设计的算术乘法器,是用VHDL语言设计的,希望对大家有帮助-Arithmetic multiplier, this is my own design arithmetic multiplier, is designed with VHDL language, and they hope to help everyone<liuchuan> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] police_siren
说明:警察车的声音,利用verilog编写,可以下载到PFGA,已经在altera cycloneIII芯片上验证成功-The sound of the police car, use verilog to write, can be downloaded to PFGA, has proved to be successful on the chip altera cycloneIII<覃继良> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] New-Compressed-(zipped)-Folder-(4)
说明:verilog code for sequence detection implemented on FPGA using quartus simulator<MPJ> 在 2024-11-09 上传 | 大小:1kb | 下载:0
[VHDL编程] New-Compressed-(zipped)-Folder-(5)
说明:traffic light controller verilog code modelsim tested<MPJ> 在 2024-11-09 上传 | 大小:1kb | 下载:0