资源列表
[VHDL编程] axi_ad9361_tx_channel
说明:采用硬件描述语言verilog进行AD9361芯片实现的代码-AD9361 using hardware descr iption languages Verilog code that chip<何晨光> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] traffic-lights
说明:使用Xilinx公司的XC95288XL芯片实现交通信号灯的控制-XC95288XL using Xilinx s chip control traffic lights<窦海霞> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] WM8731_config
说明:FPGA的语音识别芯片WM8731,已在DE2板子上实测,可用。-FPGA speech recognition chip WM8731, have been measured in DE2 board, available.<张平安> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] low_level_decrypt_8
说明:This folder consists of five vhdl files. These are low level entities of top level entity named decrypt_8 project. -This folder consists of five vhdl files. These are low level entities of top level entity named decryp<Mar Mar> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] project5_UART
说明:It is UART protocol in VHDL. it has two files. one is transmitter and one is receiver.<Arash> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] i2c_master
说明:I2C master 16 bit addr verlog 代码-verlog i2c master<jimmy> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] verilog-source-codes
说明:the attached programs are source codes of 4-bit ring counter, 16x1 mux, 8x3 priority encoder, 4x16 decoder, full subtractor using two half subtractors<apparao> 在 2024-11-19 上传 | 大小:2kb | 下载:0
[VHDL编程] gold_code_generator_rank10_b
说明:通信扩频码GOLD码序列的产生,码长度可以手动设置,VHDL语音实现。-GOLD generate communication code sequence spreading code, the code length can be set manually, VHDL voice implementation.<散散> 在 2024-11-19 上传 | 大小:2kb | 下载:0