资源列表
[VHDL编程] hdb3_codedecode
说明:用VERILOG实现的,hdb3编码器和解码器,经过前仿真和后仿真成功-Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation<Along> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] freq_counter(Verilog)
说明:数字频率计FPGA代码,用verilog语言实现。-Digital frequency meter FPGA code with verilog language.<郭志东> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] stop_watch
说明:This a running stop watch implemented on spartan 2-This is a running stop watch implemented on spartan 2<illi> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] B08040825_2_8
说明:课程设计报告,做的28译码器,很实用,供大家参考-Curriculum design report, do the 28 decoder, it is useful for reference<sdfsdfsdf> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] clock1
说明:本程序用VHDL编写数字钟,具有定点报时,手动调整时间等功能,能下载到板子上显示时间。-This program written by VHDL digital clock, with a fixed broadcast, manually adjust the time and other functions, can be downloaded to display the time on the board.<zhangshuanglu> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] KX232_PIANO_C5H
说明:FPGA的例子程序,值得借鉴和实验使用。-Examples of programs the FPGA, it is worth learning and experimental use.<田田> 在 2025-02-24 上传 | 大小:425kb | 下载:0
[VHDL编程] rs232_verilog
说明:FPGA实现串口通信实验,用verilog实现串口的发送和接收数据-FPGA Implementation of serial communication experiment, the serial port to send and receive data with verilog<zhangkaiwei> 在 2025-02-24 上传 | 大小:425kb | 下载:0