文件名称:rs232_verilog
- 所属分类:
- VHDL编程
- 资源属性:
- [VHDL] [源码]
- 上传时间:
- 2013-04-12
- 文件大小:
- 425kb
- 下载次数:
- 0次
- 提 供 者:
- zhang******
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
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介绍说明--下载内容均来自于网络,请自行研究使用
FPGA实现串口通信实验,用verilog实现串口的发送和接收数据-FPGA Implementation of serial communication experiment, the serial port to send and receive data with verilog
(系统自动生成,下载前可以参看下载内容)
下载文件列表
uart_verilog
............\db
............\..\logic_util_heursitic.dat
............\..\my_uart_top.asm.qmsg
............\..\my_uart_top.asm_labs.ddb
............\..\my_uart_top.cbx.xml
............\..\my_uart_top.cmp.cdb
............\..\my_uart_top.cmp.hdb
............\..\my_uart_top.cmp.kpt
............\..\my_uart_top.cmp.logdb
............\..\my_uart_top.cmp.rdb
............\..\my_uart_top.cmp.tdb
............\..\my_uart_top.cmp0.ddb
............\..\my_uart_top.cmp2.ddb
............\..\my_uart_top.db_info
............\..\my_uart_top.eco.cdb
............\..\my_uart_top.fit.qmsg
............\..\my_uart_top.hier_info
............\..\my_uart_top.hif
............\..\my_uart_top.lpc.html
............\..\my_uart_top.lpc.rdb
............\..\my_uart_top.lpc.txt
............\..\my_uart_top.map.cdb
............\..\my_uart_top.map.hdb
............\..\my_uart_top.map.logdb
............\..\my_uart_top.map.qmsg
............\..\my_uart_top.pre_map.cdb
............\..\my_uart_top.pre_map.hdb
............\..\my_uart_top.rtlv.hdb
............\..\my_uart_top.rtlv_sg.cdb
............\..\my_uart_top.rtlv_sg_swap.cdb
............\..\my_uart_top.sgdiff.cdb
............\..\my_uart_top.sgdiff.hdb
............\..\my_uart_top.sld_design_entry.sci
............\..\my_uart_top.sld_design_entry_dsc.sci
............\..\my_uart_top.syn_hier_info
............\..\my_uart_top.tan.qmsg
............\..\my_uart_top.tis_db_list.ddb
............\..\my_uart_top.tmw_info
............\..\my_uart_top_global_asgn_op.abo
............\..\prev_cmp_my_uart_top.asm.qmsg
............\..\prev_cmp_my_uart_top.fit.qmsg
............\..\prev_cmp_my_uart_top.map.qmsg
............\..\prev_cmp_my_uart_top.qmsg
............\..\prev_cmp_my_uart_top.tan.qmsg
............\incremental_db
............\..............\compiled_partitions
............\..............\...................\my_uart_top.root_partition.map.kpt
............\..............\README
............\my_uart_rx.v
............\my_uart_rx.v.bak
............\my_uart_top.asm.rpt
............\my_uart_top.cdf
............\my_uart_top.done
............\my_uart_top.dpf
............\my_uart_top.fit.rpt
............\my_uart_top.fit.smsg
............\my_uart_top.fit.summary
............\my_uart_top.flow.rpt
............\my_uart_top.jpg
............\my_uart_top.map.rpt
............\my_uart_top.map.smsg
............\my_uart_top.map.summary
............\my_uart_top.pin
............\my_uart_top.pof
............\my_uart_top.qpf
............\my_uart_top.qsf
............\my_uart_top.qws
............\my_uart_top.sof
............\my_uart_top.tan.rpt
............\my_uart_top.tan.summary
............\my_uart_top.v
............\my_uart_top_assignment_defaults.qdf
............\my_uart_tx.v
............\my_uart_tx.v.bak
............\osh.tcl
............\speed_select.v