资源列表
[VHDL编程] 4-bit-Multiplier
说明：IT is a 4 bit multiplier vhdl coding file which is run in altera quatrs - II. in which 4 binary bit is multiplied and waveform can be obtained<Henal patel> 在 2025-02-04 上传 | 大小：46kb | 下载：0
[VHDL编程] 4-bit-ALU
说明：it is a 4 bit airthmatic logic unit in which all basic mathematical operation of binary number can done. it is a vhdl code file<Henal patel> 在 2025-02-04 上传 | 大小：270kb | 下载：0
[VHDL编程] 4-bit-Ripple-Carry-adder
说明：it is 4 bit ripple carry adder. it is one type of counter you can say. in which carry is added. it is vhdl code and its waveform which is run in altera quars II.<Henal patel> 在 2025-02-04 上传 | 大小：25kb | 下载：0
[VHDL编程] Melay_1001
说明：it is Mealy model s vhdl code. and it was implemented and run in Altera quarts - -it is Mealy model s vhdl code. and it was implemented and run in Altera quarts - II<Henal patel> 在 2025-02-04 上传 | 大小：24kb | 下载：0
[VHDL编程] Moore_1001
说明：it is a moorey model s vhdl code which was implemented and run in altera Quarts - II<Henal patel> 在 2025-02-04 上传 | 大小：21kb | 下载：0
[VHDL编程] Frequency_Div
说明：it is vhdl code for "frequency divider" which was implemented and run in altera quarts- -it is vhdl code for "frequency divider" which was implemented and run in altera quarts- II<Henal patel> 在 2025-02-04 上传 | 大小：24kb | 下载：0
[VHDL编程] Async_fifo_verilog
说明：FIFO的用途，分类，一些重要参数，设计的难点和算法-FIFO uses, some important parameters, the difficulty of the design and algorithm<袁璐> 在 2025-02-04 上传 | 大小：14kb | 下载：0
[VHDL编程] camera_fifo_ctrl
说明：camera异步接口中FIFO控制部分的源代码-FIFO control section of the source code in the asynchronous interface, camera<袁璐> 在 2025-02-04 上传 | 大小：1kb | 下载：0