资源列表
[VHDL编程] FPGAshilier
说明:各种fpga的开发资料,非常适用,实在是难得的资料,对于初学者非常有帮助-The development of a variety of FPGA information, very useful, it is hard to come by the information very helpful for beginners<liwen> 在 2024-11-19 上传 | 大小:2.31mb | 下载:0
[VHDL编程] FPGAshilisan
说明:各种fpga的开发资料,非常适用,实在是难得的资料,对于初学者非常有帮助-The development of a variety of FPGA information, very useful, it is hard to come by the information very helpful for beginners<liwen> 在 2024-11-19 上传 | 大小:588kb | 下载:0
[VHDL编程] Altera-Test
说明:各种VHDL的开发资料,非常适用,实在是难得的资料,对于初学者非常有帮助-VHDL development of a variety of information, very useful, it is hard to come by the information very helpful for beginners<liwen> 在 2024-11-19 上传 | 大小:822kb | 下载:0
[VHDL编程] ram_command_reading
说明:这是一个由得到的命令(地址)从RAM 中读取命令并送入一个名为FUNREG的寄存器的代码,和前面的MINICORE 可以衔接,属于mikroprogrammbar steuerwerk(可编程的控制器) 与FSM (有限状态机)构成的控制器相对-This is a get command (address) from the RAM read command and sent to a register of FUNREG code,<辛罡> 在 2024-11-19 上传 | 大小:40kb | 下载:0
[VHDL编程] VHDLcircuitdesign
说明:这是一本关于VHDL电路设计的原始英文版资料,但却通俗易懂,里面有每章讲解的例子设计-This is a VHDL circuit design on the original English version of the information, but user-friendly, there are examples in each chapter explain the design<kemuni> 在 2024-11-19 上传 | 大小:4.82mb | 下载:0
[VHDL编程] source_verilog
说明:verilog source crc criteria, such as CYXLIC REDUNDANCY -verilog source crc criteria, such as CYXLIC REDUNDANCY<plo> 在 2024-11-19 上传 | 大小:259kb | 下载:0
[VHDL编程] TLC5510_VHDL
说明:基于VHDL语言,实现对高速A/D器件TLC5510控制-Based on the VHDL language, to achieve high-speed A/D device control TLC5510<huangsong> 在 2024-11-19 上传 | 大小:1kb | 下载:0