资源列表
[VHDL编程] VHDLlanguage
说明:VHDL语言详解,详细描述了VHDL语言设计规范,有帮助哦-VHDL LANGUAGE DESIGN<dragon> 在 2024-10-15 上传 | 大小:852992 | 下载:0
[VHDL编程] VHDL_FPGA_design
说明:VHDL FPGA 设计流程,基本原理和方法,比较全面。-FPGA VHDL DESIGN<dragon> 在 2024-10-15 上传 | 大小:218112 | 下载:0
[VHDL编程] 19854799dul_ram(yk)
说明:双口RAM的FPGA源码Altera 活XIinx或ATmel公司都可以-Dual-port RAM of the FPGA source<gadan> 在 2024-10-15 上传 | 大小:3072 | 下载:0
[VHDL编程] Avalon_VGA_Controller
说明:Vga Controller source code for Altera FPGA<leblebitozu> 在 2024-10-15 上传 | 大小:324608 | 下载:0
[VHDL编程] altera_sdram
说明:Simple SDRAM controller source code for Altera DE2 board<leblebitozu> 在 2024-10-15 上传 | 大小:7168 | 下载:0
[VHDL编程] oc8051.tar
说明:8051 core writen in VHDL, fully functional and tested<eldis> 在 2024-10-15 上传 | 大小:1513472 | 下载:0
[VHDL编程] miniuart.tar
说明:Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication<eldis> 在 2024-10-15 上传 | 大小:6144 | 下载:0
[VHDL编程] usb_phy.tar
说明:Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX se<eldis> 在 2024-10-15 上传 | 大小:7168 | 下载:0
[VHDL编程] simple_spi.tar
说明:Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating frequency range, 4deep read and write fifos, and programmable transfer<eldis> 在 2024-10-15 上传 | 大小:574464 | 下载:0
[VHDL编程] mcpu_1.06b
说明:MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable<eldis> 在 2024-10-15 上传 | 大小:248832 | 下载:0
[VHDL编程] usart_verilog
说明:Uart verilog 代码 可综合 很好的代码-Uart verilog code<shenhao> 在 2024-10-15 上传 | 大小:15360 | 下载:0