资源列表
[VHDL编程] SWAPPING
说明：swapping program in verilog hdl when two slots has to work in simultaneously.<naresh_cool> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] manchester_verilog
说明： This design is targeted to the XCR3064XL-7VQ100C CoolRunner CPLD. This is a 3V, 64 macrocell device in a 100 VQFP package. The fitter was allowed to pick the pin-out for the device.<vijendra pal> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] 65905857-A-A
说明：vhdl code for risc processor-vhdl code for risc processor...........................<satya> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] 67719585-Booth-Multiplier-Vhdl-Code
说明：vhdl code for booth multiplier-vhdl code for booth multiplier...........................<satya> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] LFSR_UPDOWN_Verilog
说明：the LFSR up/down counter are designed in a verilog module easy to implement in any counter operation.<rajapraba> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] upcounder_verilog
说明：the up counter are designed to the case statement to perform the counter operation in verilog.<rajapraba> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] Verilog_Decoder
说明：Decoder are designed to the case statement to minize the coding and computation time for a decoder operation in verilog module.<rajapraba> 在 2025-02-07 上传 | 大小：10kb | 下载：0
[VHDL编程] Verilog_Encoder
说明：the encoder operation can perform in verilog to use the case statement.<rajapraba> 在 2025-02-07 上传 | 大小：10kb | 下载：0