资源列表
[VHDL编程] NandFlashController
说明:NAND FLASH控制器源代码-NAND FLASH controller source code .............<hongxiao> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] mips_8bit_verilog
说明:MIPS multicycle Implementation in Verilog<Samyak> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] Verilog_juzhenjianpan
说明:采用Verilog编写的4x4矩阵键盘的程序。该程序经过验证可行。-Implementation of 4x4 matrix keyboard Verilog language. After verification, the feasible.<wyf> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] Verilog-language--de-CPU
说明:基于verilog语言的FPGA开发,平台在QuartusII上,对SDRAM的读写-Verilog language based FPGA development platform on QuartusII, the SDRAM read and write<宋雪涛> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] XU-LIE-JIAN-CE-QI
说明:用状态机实现序列检测器的源代码,用maxplus软件运行,管脚已配置完成,芯片为EP1K30TC144-3-State of mind achieved with a sequence detector source code, run the software with maxplus Pin has been configured, the chip is EP1K30TC144-3<邱海涛> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] cai-yang-dian-lu-shi-xian-ADC0809
说明:用状态机对ADC0809的采样控制电路的实现的源代码,用maxplus软件运行,管脚已配置完成,芯片为EP1K30TC144-3-State machine to achieve ADC0809 sampling control circuit of the source code, run the software with maxplus Pin has been configured, the chip is EP1K30TC14<邱海涛> 在 2025-02-26 上传 | 大小:41kb | 下载:0
[VHDL编程] 10-sequence-detector
说明:本系统采用实验箱的48MHz时钟作为输入时钟,将其分频得到计数器计数频率和序列检测器检测序列频率-The system uses a 48MHz clock experimental box as the input clock, to get the counter frequency divider and serial sequence frequency detector<陈颖> 在 2025-02-26 上传 | 大小:41kb | 下载:0