说明:This vhdl code has a simple implementation of an UART receiver. This code was generated march 2011 as a universuty project <plcpe> 在 2025-01-26 上传
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说明:sram design is it,u can see its easy ,so i upload it here
my frnds it is useful code see this
it is in vhdl language
<pragya> 在 2025-01-26 上传
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说明:Verilog硬件描述语言,RS232串口发送接收程序-Verilog hardware descr iption language, RS232 serial port send and receive program <zhaoyf> 在 2025-01-26 上传
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说明:HS162-4字符液晶显示控制源程序,使用Verilog硬件描述语言进行编程-HS162-4 character liquid crystal display control source, the use of Verilog hardware descr iption language programming <zhaoyf> 在 2025-01-26 上传
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