资源列表
[VHDL编程] information_box_code1.10
说明:jibengongnengverilog(jibengongneng verilog)<fishking > 在 2024-11-10 上传 | 大小:37.8mb | 下载:0
[VHDL编程] key_filter
说明:Verilog实现按键滤波,亲测可用,有需要的可以下载看看(Verilog to achieve key filter)<xxllff > 在 2024-11-10 上传 | 大小:1kb | 下载:0
[VHDL编程] Xilinx ISE14_7破解文件和步骤已测可用
说明:对于xinlinx ise的破解文件和步骤说明,亲测可用(here is a package of xilinx ise which could use to break the boundaries)<shows > 在 2024-11-10 上传 | 大小:5kb | 下载:0
[VHDL编程] Comprehensive_FM_IP
说明:在vivado平台上的用verilog语言编写的FM直接调制程序(On vivado platform of FM modulation directly program written in verilog language)<wuyuyanglei > 在 2024-11-10 上传 | 大小:79.23mb | 下载:0
[VHDL编程] Kisi Kisi -20171008
说明:It is a long established fact that a reader will be distracted by the readable content of a page when looking at its layout. The point of using Lorem Ipsum is that it has a more-or-less normal distribution of letters, as<nana12341234 > 在 2024-11-10 上传 | 大小:52kb | 下载:0
[VHDL编程] pipeline_adder
说明:用于快速计算32位加法,共分5级锁存器,4个8位加法器(pipeline_adder it helps you to add 32 bits swiftly if you need more information,may call me by the website account,it's really helpful)<Joker13213 > 在 2024-11-10 上传 | 大小:78kb | 下载:0
[VHDL编程] uwghb
说明:FIG simulation speed, distance, amplitude three-dimensional image, Use of natural gradient algorithm, Suppressed carrier type differential phase modulation.<lingsaijanyou > 在 2024-11-10 上传 | 大小:146kb | 下载:0
[VHDL编程] mux_2to1_4to1_8to1
说明:design verilog hdl for mux 2to1, mux4to1, mux8to1<14520950 > 在 2024-11-10 上传 | 大小:1kb | 下载:0