资源列表
[VHDL编程] Comparateur-4-bits
说明:4-bit comparator code VHDL<asmae taz> 在 2025-04-24 上传 | 大小:8kb | 下载:0
[VHDL编程] class11_uart_tx
说明:verilog编写的串口发送程序,学习串口的话可以用作参考,已经实际验证过-Verilog prepared by the serial port to send procedures, learning serial port can be used as a reference, has actually verified<刘> 在 2025-04-24 上传 | 大小:1.17mb | 下载:0
[VHDL编程] class12_uart_rx
说明:verilog编写的串口接收程序,学习串口的话可以用作参考,已经实际验证过-Verilog prepared by the serial receiving procedures, learning serial port can be used as a reference, has been verified<刘> 在 2025-04-24 上传 | 大小:1.25mb | 下载:0
[VHDL编程] class19_IR
说明:verilog编写的红外解码程序,学习红外的话可以用作参考,已经实际验证过-Verilog prepared by the infrared decoding procedures, learning infrared can be used as a reference, has actually verified<刘> 在 2025-04-24 上传 | 大小:2.82mb | 下载:0
[VHDL编程] ASK-modulation-
说明:ASK调制与解调VHDL程序及仿真,这个程序非常有用,可以很好的理解ASK-ASK modulation and demodulation process and VHDL simulation, this program is very useful, it can be well understood ASK<谢培> 在 2025-04-24 上传 | 大小:42kb | 下载:0
[VHDL编程] Multiplier
说明:复用全加器来实现乘法器, 通过从右到左互为输入输出,实现低位计算。最左向高位输出。具体要求请参见附带的PDF。-Multiplexing a multiplier to achieve full adder, input and output by each other right to left, the least significant bits is calculated. Most left output to high.<Wind> 在 2025-04-24 上传 | 大小:370kb | 下载:0