[VHDL编程] ad7658

说明：AD7658 verilog源码，下载后可以直接使用-AD7658 verilog source code can be used directly after download
<熊熊> 在 2025-01-16 上传 | 大小：1kb | 下载：0

[VHDL编程] dct

说明：LTE通信中DCT算法的VERILOG实现，给初学者提供参考。-LTE communication VERILOG algorithm DCT implementation, to provide a reference for beginners.
<kobe> 在 2025-01-16 上传 | 大小：29kb | 下载：0

[VHDL编程] mycfft

说明：LTE通信中的cfft算法的VERILOG实现，具有一定的参考意义。-LTE communication in the VERILOG algorithm CFFT implementation, with a certain reference value.
<kobe> 在 2025-01-16 上传 | 大小：1.99mb | 下载：0

[VHDL编程] fifo

说明：异步FIFO的verilog实现，可以参考一下-Verilog asynchronous FIFO implementation, you can refer to
<kobe> 在 2025-01-16 上传 | 大小：50kb | 下载：0

[VHDL编程] ldpc576

说明：基于wimax协议的低密度奇偶校验码LDPC的VERILOG实现，亲测可用。-WiMAX protocol based on the low density parity check code VERILOG LDPC implementation, pro test available.
<kobe> 在 2025-01-16 上传 | 大小：534kb | 下载：0

[VHDL编程] and_gate

说明：this program is done in verilog hdl and it is program of AND gate gate level modeling program-this program is done in verilog hdl and it is program of AND gate gate level modeling program
<hetang> 在 2025-01-16 上传 | 大小：137kb | 下载：0

[VHDL编程] and_data

说明：this program is done in verilog hdl and it is program of AND gate DATA level modeling program-this program is done in verilog hdl and it is program of AND gate DATA level modeling program
<hetang> 在 2025-01-16 上传 | 大小：120kb | 下载：0

[VHDL编程] and_beh

说明：this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program-this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program
<hetang> 在 2025-01-16 上传 | 大小：98kb | 下载：0

[VHDL编程] nand_gate

说明：this program is done in verilog hdl and it is program of NAND gate gate level modeling program-this program is done in verilog hdl and it is program of NAND gate gate level modeling program
<hetang> 在 2025-01-16 上传 | 大小：123kb | 下载：0

[VHDL编程] nand_data

说明：this program is done in verilog hdl and it is program of AND gate DATA level modeling program-this program is done in verilog hdl and it is program of AND gate DATA level modeling program
<hetang> 在 2025-01-16 上传 | 大小：122kb | 下载：0

[VHDL编程] sp6_BoardTest

说明：针对xilinx spartan6芯片做的测试板测试用例-xilinx FPGA product SPARTAN6 test example
<刘用> 在 2025-01-16 上传 | 大小：10.14mb | 下载：0

[VHDL编程] CD1_PHOTO_ABLUM_1280

说明：基于FPGA的数码像册实验，使用了NIOS做文件系统和JPEG图像解码FPGA和SDRAM做了图像缓存-Based on the FPGA digital image book experiment, using the NIOS to do file system and JPEG image decoding FPGA and SDRAM do the image cache
<丁> 在 2025-01-16 上传 | 大小：2.87mb | 下载：0