资源列表
[VHDL编程] moore_state_machine_v
说明:moor状态机的示例代码,再次基础上可以学习标准的状态机写法-moor state machine sample code, we can once again learning standards based on the wording of the state machine<tiangang> 在 2024-11-14 上传 | 大小:2kb | 下载:0
[VHDL编程] user_encoded_machine_v
说明:The Verilog HDL Templates for State Machines that included in the Design Example web page are: o 4-State Mealy State Machine o 4-State Moore State Machine o Safe State Machine o User-Encoded State Machine-T<tiangang> 在 2024-11-14 上传 | 大小:2kb | 下载:0
[VHDL编程] safe_state_machine_v
说明:The Verilog HDL Templates for State Machines that included in the Design Example web page are: o 4-State Mealy State Machine o 4-State Moore State Machine o Safe State Machine o User-Encoded State Machine-T<tiangang> 在 2024-11-14 上传 | 大小:2kb | 下载:0
[VHDL编程] OV7670_VGA
说明:实现OV7670照相机采集和在VGA显示屏上进行显示,易于理解和学习。-OV7670 camera acquisition and display on VGA display screen, easy to understand and learn.<卢文建> 在 2024-11-14 上传 | 大小:886kb | 下载:0
[VHDL编程] simwindfarm-v1.0
说明:GFH GFH DFHFDHD GHDHFDHHFD DFHFDHDF-GFHGFHGFH DFHFDHD GHDHFDHHFD DFHFDHDF<kmiller@dayrep.com> 在 2024-11-14 上传 | 大小:43.37mb | 下载:9
[VHDL编程] Combinational
说明:this is a sample of combinational circuit in Verilog and VHDL. such as multiplexer, decoder, adder etc<goreng> 在 2024-11-14 上传 | 大小:5kb | 下载:0
[VHDL编程] sequential
说明:this a sample of sequential circuit in verilog and VHDL-this is a sample of sequential circuit in verilog and VHDL<goreng> 在 2024-11-14 上传 | 大小:108kb | 下载:0
[VHDL编程] Filterfgfftd
说明:LIBRARY ieee USE ieee.std_logic_1164.ALL library work use work.fft_pkg.all<goreng> 在 2024-11-14 上传 | 大小:6.02mb | 下载:0