资源列表
[VHDL编程] Verilog-example1
说明:verilog实例讲解,经典例子分析,可以有效地帮助初学者入门。-verilog examples to explain, a classic example of the analysis, can effectively help beginners.<lyon> 在 2024-11-19 上传 | 大小:35kb | 下载:0
[VHDL编程] Verilog-example2
说明:verilog 实例讲解第二部分,进一步拓展对基础知识的应用,通过实例分析帮助大家理解verilog-verilog examples to explain the second part, to further expand on the basics of the application, by an example to help you understand verilog<lyon> 在 2024-11-19 上传 | 大小:24kb | 下载:0
[VHDL编程] Verilog-example3
说明:verilog实例分析第三部分,通过实例分析讲解有限状态机的设计过程。-The third case study verilog part, by an example to explain the finite state machine design process.<lyon> 在 2024-11-19 上传 | 大小:1.48mb | 下载:0
[VHDL编程] MastersThesisPreliminaryReport
说明:developmentof a reconfigurable muti-protocol verification environment using uvm methodology<王小米> 在 2024-11-19 上传 | 大小:152kb | 下载:0
[VHDL编程] convertermat
说明:Embedded applications have emerged appreciably during the past few years due to the considerable increase of nomad and traveller ways of life. These itinerant lifestyles induce the apparition and development of more<shankar.m> 在 2024-11-19 上传 | 大小:1.8mb | 下载:0
[VHDL编程] matlabtoconver
说明:Embedded applications have emerged appreciably during the past few years due to the considerable increase of nomad and traveller ways of life. These itinerant lifestyles induce the apparition and development of more<shankar.m> 在 2024-11-19 上传 | 大小:3kb | 下载:0
[VHDL编程] matlabtomodelsim
说明:matlab to model sim converter coding of vhdl code ypu want to convert that matlab into the xilinx platform model sim simulator<shankar.m> 在 2024-11-19 上传 | 大小:1kb | 下载:0
[VHDL编程] ldpc-decoder-code
说明:Specify the decision method used for decoding as one of Hard decision | Soft decision . The default is Hard decision . When you set this property to Hard decision , the output is decoded bits of double or logical data ty<shankar.m> 在 2024-11-19 上传 | 大小:2kb | 下载:0