资源列表
[VHDL编程] 1-D-DWT_verilog-code
说明:Image compression is one of the prominent topics in image processing that plays a very important role in reducing image size for real-time transmission and storage. Many of the standards recommend the use of DWT fo<jeason> 在 2025-01-20 上传 | 大小:1.41mb | 下载:0
[VHDL编程] A_PUF_Design
说明:基于fpga的物理不可克隆函数(PUF)模块的实现-A PUF Design for Secure FPGA-Based Embedded Systems<Rain> 在 2025-01-20 上传 | 大小:324kb | 下载:0
[VHDL编程] 5760finalproject
说明:verilog实现的rsa加解密系统,包括大素数生成算法,包含测试文件。-rsa encryption system using verilog, including large prime number generation algorithms, including test file.<Rain> 在 2025-01-20 上传 | 大小:1.54mb | 下载:0