文件名称:ddsfinal1

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 1.08mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 杨*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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verilog语言实现的dds代码,并行通信,生成四种波形,大赛编写的代码,modelsim仿真-verilog language dds code,modelsim debug
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ddsfinal1\rom_syn.v

.........\dds_final.v

.........\nmux4.v

.........\decoder_38.v

.........\dds.v

.........\rom.mif

.........\dds_final.qpf

.........\dds_final.qsf

.........\dds_final.map.summary

.........\dds_final.pin

.........\dds_final.fit.smsg

.........\dds_final.fit.summary

.........\dds_final.sof

.........\dds_final.pof

.........\dds_final.tan.summary

.........\dds_final.v.bak

.........\dds_final.merge.rpt

.........\dds_final.done

.........\dds_final_nativelink_simulation.rpt

.........\rom_syn_waveforms.html

.........\rom_syn_wave0.jpg

.........\rom_syn_wave1.jpg

.........\rom_syn.inc

.........\rom_syn.bsf

.........\rom_syn_inst.v

.........\rom_syn_bb.v

.........\rom_syn.qip

.........\dds.bsf

.........\dds_final.bsf

.........\decoder_38.bsf

.........\nmux4.bsf

.........\dds_final.dpf

.........\dds_final.cdf

.........\simulation\modelsim\dds_final_modelsim.xrf

.........\..........\........\dds_final.vo

.........\..........\........\dds_final_v.sdo

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak2

.........\..........\........\dds_final_run_msim_rtl_verilog.do

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak3

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak4

.........\..........\........\vsim.wlf

.........\..........\........\rom.mif

.........\..........\........\rom.ver

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak1

.........\..........\........\dds_final.vt.bak

.........\..........\........\dds_final.vt

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak5

.........\..........\........\dds_final.sft

.........\..........\........\dds_final_run_msim_rtl_verilog.do.bak6

.........\..........\........\msim_transcript

.........\..........\........\rtl_work\_info

.........\..........\........\........\_vmake

.........\..........\........\........\rom_syn\_primary.vhd

.........\..........\........\........\.......\verilog.psm

.........\..........\........\........\.......\_primary.dbs

.........\..........\........\........\.......\_primary.dat

.........\..........\........\........\dds\_primary.vhd

.........\..........\........\........\...\verilog.psm

.........\..........\........\........\...\_primary.dbs

.........\..........\........\........\...\_primary.dat

.........\..........\........\........\..._final\_primary.vhd

.........\..........\........\........\.........\verilog.psm

.........\..........\........\........\.........\_primary.dbs

.........\..........\........\........\.........\_primary.dat

.........\..........\........\........\.ecoder_38\_primary.vhd

.........\..........\........\........\..........\verilog.psm

.........\..........\........\........\..........\_primary.dbs

.........\..........\........\........\..........\_primary.dat

.........\..........\........\........\nmux4\_primary.vhd

.........\..........\........\........\.....\verilog.psm

.........\..........\........\........\.....\_primary.dbs

.........\..........\........\........\.....\_primary.dat

.........\..........\........\........\dds_final_vlg_tst\_primary.vhd

.........\..........\........\........\.................\verilog.psm

.........\..........\........\........\.................\_primary.dbs

.........\..........\........\........\.................\_primary.dat

.........\..........\........\modelsim.ini

.........\incremental_db\README

.........\..............\compiled_partitions\dds_final.root_partition.map.kpt

.........\..............\...................\dds_final.root_partition.map.atm

.........\..............\...................\dds_final.root_partition.map.hdbx

.........\..............\...................\dds_final.root_partition.cmp.rcf

.........\..............\...................\dds_final.root_partition.cmp.hdbx

.........\..............\...................\dds_final.root_partition.cmp.atm

.........\..............\...................\dds_final.root_partition.cmp.logdb

.........\..............\...................\dds_final.root_partition.cmp.kpt

.........\............

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