文件名称:the-verilog-code-of-can-usb-i2c

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-12-15
  • 文件大小:
  • 1.82mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • bai****
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CAN总线,I2C,USB等的FPGA实现源码-CAN bus, I2C, USB, etc. FPGA implementation source
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CAN总线,I2C,USB等的FPGA实现源码

.................................\CAN总线,I2C,USB等的FPGA实现源码

.................................\.................................\Chapter10 Sample

.................................\.................................\................\eth_clockgen.v

.................................\.................................\................\eth_cop.v

.................................\.................................\................\eth_crc.v

.................................\.................................\................\eth_defines.v

.................................\.................................\................\eth_fifo.v

.................................\.................................\................\eth_host.v

.................................\.................................\................\eth_maccontrol.v

.................................\.................................\................\eth_macstatus.v

.................................\.................................\................\eth_memory.v

.................................\.................................\................\eth_miim.v

.................................\.................................\................\eth_outputcontrol.v

.................................\.................................\................\eth_phy.v

.................................\.................................\................\eth_phy_defines.v

.................................\.................................\................\eth_random.v

.................................\.................................\................\eth_receivecontrol.v

.................................\.................................\................\eth_register.v

.................................\.................................\................\eth_registers.v

.................................\.................................\................\eth_rxaddrcheck.v

.................................\.................................\................\eth_rxcounters.v

.................................\.................................\................\eth_rxethmac.v

.................................\.................................\................\eth_rxstatem.v

.................................\.................................\................\eth_shiftreg.v

.................................\.................................\................\eth_spram_256x32.v

.................................\.................................\................\eth_top.v

.................................\.................................\................\eth_transmitcontrol.v

.................................\.................................\................\eth_txcounters.v

.................................\.................................\................\eth_txethmac.v

.................................\.................................\................\eth_txstatem.v

.................................\.................................\................\eth_wishbone.v

.................................\.................................\................\tb_cop.v

.................................\.................................\................\tb_ethernet.v

.................................\.................................\................\tb_ethernet_with_cop.v

.................................\.................................\................\tb_eth_defines.v

.................................\.................................\................\tb_eth_top.v

.................................\.................................\................\timescale.v

.................................\.................................\................\wb_bus_mon.v

.................................\.................................\................\wb_master32.v

.................................\.................................\................\wb_master_behavioral.v

.................................\.................................\................\wb_model_defines.v

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