文件名称:an499_design_example
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cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
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下载文件列表
an499_design_example
....................\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example
....................\.............................................\code
....................\.............................................\....\addr_gen.v
....................\.............................................\....\mobile_sdram.v
....................\.............................................\....\upcount_2.v
....................\.............................................\....\upcount_4.v
....................\.............................................\modelsim
....................\.............................................\........\addr_gen.v
....................\.............................................\........\mobile_sdram.cr.mti
....................\.............................................\........\mobile_sdram.mpf
....................\.............................................\........\mobile_sdram.v
....................\.............................................\........\test_mob_sdram.v
....................\.............................................\........\upcount_2.v
....................\.............................................\........\upcount_4.v
....................\.............................................\........\vsim.wlf
....................\.............................................\........\wave.do
....................\.............................................\........\work
....................\.............................................\........\....\addr_gen
....................\.............................................\........\....\........\verilog.psm
....................\.............................................\........\....\........\_primary.dat
....................\.............................................\........\....\........\_primary.vhd
....................\.............................................\........\....\mobile_sdram
....................\.............................................\........\....\............\verilog.psm
....................\.............................................\........\....\............\_primary.dat
....................\.............................................\........\....\............\_primary.vhd
....................\.............................................\........\....\test_mob_sdram
....................\.............................................\........\....\..............\verilog.psm
....................\.............................................\........\....\..............\_primary.dat
....................\.............................................\........\....\..............\_primary.vhd
....................\.............................................\........\....\upcount_2
....................\.............................................\........\....\.........\verilog.psm
....................\.............................................\........\....\.........\_primary.dat
....................\.............................................\........\....\.........\_primary.vhd
....................\.............................................\........\....\upcount_4
....................\.............................................\........\....\.........\verilog.psm
....................\.............................................\........\....\.........\_primary.dat
....................\.............................................\........\....\.........\_primary.vhd
....................\.............................................\........\....\_info
....................\.............................................\quartus
....................\.............................................\.......\addr_gen.v
....................\.............................................\.......\db
....................\.............................................\.......\..\mobile_sdram.asm.qmsg
....................\.............................................\.......\..\mobile_sdram.asm_labs.ddb
....................\.............................................\
....................\Mobile_DRAM_Altera_MAX_II_CPLD_Design_Example
....................\.............................................\code
....................\.............................................\....\addr_gen.v
....................\.............................................\....\mobile_sdram.v
....................\.............................................\....\upcount_2.v
....................\.............................................\....\upcount_4.v
....................\.............................................\modelsim
....................\.............................................\........\addr_gen.v
....................\.............................................\........\mobile_sdram.cr.mti
....................\.............................................\........\mobile_sdram.mpf
....................\.............................................\........\mobile_sdram.v
....................\.............................................\........\test_mob_sdram.v
....................\.............................................\........\upcount_2.v
....................\.............................................\........\upcount_4.v
....................\.............................................\........\vsim.wlf
....................\.............................................\........\wave.do
....................\.............................................\........\work
....................\.............................................\........\....\addr_gen
....................\.............................................\........\....\........\verilog.psm
....................\.............................................\........\....\........\_primary.dat
....................\.............................................\........\....\........\_primary.vhd
....................\.............................................\........\....\mobile_sdram
....................\.............................................\........\....\............\verilog.psm
....................\.............................................\........\....\............\_primary.dat
....................\.............................................\........\....\............\_primary.vhd
....................\.............................................\........\....\test_mob_sdram
....................\.............................................\........\....\..............\verilog.psm
....................\.............................................\........\....\..............\_primary.dat
....................\.............................................\........\....\..............\_primary.vhd
....................\.............................................\........\....\upcount_2
....................\.............................................\........\....\.........\verilog.psm
....................\.............................................\........\....\.........\_primary.dat
....................\.............................................\........\....\.........\_primary.vhd
....................\.............................................\........\....\upcount_4
....................\.............................................\........\....\.........\verilog.psm
....................\.............................................\........\....\.........\_primary.dat
....................\.............................................\........\....\.........\_primary.vhd
....................\.............................................\........\....\_info
....................\.............................................\quartus
....................\.............................................\.......\addr_gen.v
....................\.............................................\.......\db
....................\.............................................\.......\..\mobile_sdram.asm.qmsg
....................\.............................................\.......\..\mobile_sdram.asm_labs.ddb
....................\.............................................\