文件名称:uart_verilog
介绍说明－－下载内容均来自于网络，请自行研究使用
this is a sample about UART transmission,it s default installation is D:\\RedLogic\\RCII_samples, and the software environment is quatrusII 5.0,it is usefull for studying UART.
(系统自动生成,下载前可以参看下载内容)
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压缩包 : 111186769uart_verilog.rar 列表 UART\Doc\RCA-CY1C12开发板UART示例说明.doc UART\Doc\sscom.ini UART\Doc\sscom32.exe UART\Doc\xapp341.pdf UART\func_sim\transcript UART\func_sim\txmit_tf.do UART\func_sim\uart.cr.mti UART\func_sim\uart.mpf UART\func_sim\uart_tb.do UART\func_sim\uart_tb_fixed.do UART\func_sim\vish_stacktrace.vstf UART\func_sim\vsim.wlf UART\func_sim\wave.do UART\func_sim\work\@u@a@r@t_tb\verilog.asm UART\func_sim\work\@u@a@r@t_tb\_primary.dat UART\func_sim\work\@u@a@r@t_tb\_primary.vhd UART\func_sim\work\rcvr\verilog.asm UART\func_sim\work\rcvr\_primary.dat UART\func_sim\work\rcvr\_primary.vhd UART\func_sim\work\txmit\verilog.asm UART\func_sim\work\txmit\_primary.dat UART\func_sim\work\txmit\_primary.vhd UART\func_sim\work\uart\verilog.asm UART\func_sim\work\uart\_primary.dat UART\func_sim\work\uart\_primary.vhd UART\func_sim\work\uart_if\verilog.asm UART\func_sim\work\uart_if\_primary.dat UART\func_sim\work\uart_if\_primary.vhd UART\func_sim\work\_info UART\physical\altclklock0.bsf UART\physical\altclklock0.v UART\physical\altclklock0_bb.v UART\physical\async_transmitter.bsf UART\physical\cmp_state.ini UART\physical\db\altsyncram_8tj.tdf UART\physical\db\altsyncram_9un.tdf UART\physical\db\altsyncram_g5q.tdf UART\physical\db\cntr_cs6.tdf UART\physical\db\cntr_gs6.tdf UART\physical\db\cntr_ub7.tdf UART\physical\db\cntr_vt6.tdf UART\physical\db\uart_if(0).cnf.cdb UART\physical\db\uart_if(0).cnf.hdb UART\physical\db\uart_if(1).cnf.cdb UART\physical\db\uart_if(1).cnf.hdb UART\physical\db\uart_if(10).cnf.cdb UART\physical\db\uart_if(10).cnf.hdb UART\physical\db\uart_if(11).cnf.cdb UART\physical\db\uart_if(11).cnf.hdb UART\physical\db\uart_if(12).cnf.cdb UART\physical\db\uart_if(12).cnf.hdb UART\physical\db\uart_if(13).cnf.cdb UART\physical\db\uart_if(13).cnf.hdb UART\physical\db\uart_if(14).cnf.cdb UART\physical\db\uart_if(14).cnf.hdb UART\physical\db\uart_if(15).cnf.cdb UART\physical\db\uart_if(15).cnf.hdb UART\physical\db\uart_if(16).cnf.cdb UART\physical\db\uart_if(16).cnf.hdb UART\physical\db\uart_if(17).cnf.cdb UART\physical\db\uart_if(17).cnf.hdb UART\physical\db\uart_if(18).cnf.cdb UART\physical\db\uart_if(18).cnf.hdb UART\physical\db\uart_if(19).cnf.cdb UART\physical\db\uart_if(19).cnf.hdb UART\physical\db\uart_if(2).cnf.cdb UART\physical\db\uart_if(2).cnf.hdb UART\physical\db\uart_if(20).cnf.cdb UART\physical\db\uart_if(20).cnf.hdb UART\physical\db\uart_if(21).cnf.cdb UART\physical\db\uart_if(21).cnf.hdb UART\physical\db\uart_if(22).cnf.cdb UART\physical\db\uart_if(22).cnf.hdb UART\physical\db\uart_if(23).cnf.cdb UART\physical\db\uart_if(23).cnf.hdb UART\physical\db\uart_if(24).cnf.cdb UART\physical\db\uart_if(24).cnf.hdb UART\physical\db\uart_if(25).cnf.cdb UART\physical\db\uart_if(25).cnf.hdb UART\physical\db\uart_if(26).cnf.cdb UART\physical\db\uart_if(26).cnf.hdb UART\physical\db\uart_if(27).cnf.cdb UART\physical\db\uart_if(27).cnf.hdb UART\physical\db\uart_if(3).cnf.cdb UART\physical\db\uart_if(3).cnf.hdb UART\physical\db\uart_if(4).cnf.cdb UART\physical\db\uart_if(4).cnf.hdb UART\physical\db\uart_if(5).cnf.cdb UART\physical\db\uart_if(5).cnf.hdb UART\physical\db\uart_if(6).cnf.cdb UART\physical\db\uart_if(6).cnf.hdb UART\physical\db\uart_if(7).cnf.cdb UART\physical\db\uart_if(7).cnf.hdb UART\physical\db\uart_if(8).cnf.cdb UART\physical\db\uart_if(8).cnf.hdb UART\physical\db\uart_if(9).cnf.cdb UART\physical\db\uart_if(9).cnf.hdb UART\physical\db\uart_if.(0).cnf.cdb UART\physical\db\uart_if.(0).cnf.hdb UART\physical\db\uart_if.(1).cnf.cdb UART\physical\db\uart_if.(1).cnf.hdb UART\physical\db\uart_if.(2).cnf.cdb UART\physical\db\uart_if.(2).cnf.hdb UART\physical\db\uart_if.(3).cnf.cdb UART\physical\db\uart_if.(3).cnf.hdb UART\physical\db\uart_if.(4).cnf.cdb UART\physical\db\uart_if.(4).cnf.hdb UART\physical\db\uart_if.(5).cnf.cdb UART\physical\db\uart_if.(5).cnf.hdb UART\physical\db\uart_if.(6).cnf.cdb UART\physical\db\uart_if.(6).cnf.hdb UART\physical\db\uart_if.(7).cnf.cdb UART\physical\db\uart_if.(7).cnf.hdb UART\physical\db\uart_if.(8).cnf.cdb UART\physical\db\uart_if.(8).cnf.hdb UART\physical\db\uart_if.(9).cnf.cdb UART\physical\db\uart_if.(9).cnf.hdb UART\physical\db\uart_if.asm.qmsg UART\physical\db\uart_if.cbx.xml UART\physical\db\uart_if.cmp.cdb UART\physical\db\uart_if.cmp.hdb UART\physical\db\uart_if.cmp.rdb UART\physical\db\uart_if.cmp.tdb UART\physical\db\uart_if.cmp0.ddb UART\physical\db\uart_if.db_info UART\physical\db\uart_if.eco.cdb UART\physical\db\uart_if.eda.qmsg UART\physical\db\uart_if.fit.qmsg UART\physical\db\uart_if.hier_info UART\physical\db\uart_if.hif UART\physical\db\uart_if.map.cdb UART\physical\db\uart_if.map.hdb UART\physical\db\uart_if.map.qmsg UART\physical\db\uart_if.pre_map.cdb UART\physical\db\uart_if.pre_map.hdb UART\physical\db\uart_if.psp UART\physical\db\uart_if.rtlv.hdb UART\physical\db\uart_if.rtlv_sg.cdb UART\physical\db\uart_if.rtlv_sg_swap.cdb UART\physical\db\uart_if.sgdiff.cdb UART\physical\db\uart_if.sgdiff.hdb UART\physical\db\uart_if.signalprobe.cdb UART\physical\db\uart_if.sld_design_entry.sci UART\physical\db\uart_if.sld_design_entry_dsc.sci UART\physical\db\uart_if.syn_hier_info UART\physical\db\uart_if.tan.qmsg UART\physical\db\uart_if_cmp.qrpt UART\physical\db\uart_if_hier_info UART\physical\db\uart_if_syn_hier_info UART\physical\div.bsf UART\physical\div_2.bsf UART\physical\div_2.v UART\physical\filter.bsf UART\physical\LED_flush.bsf UART\physical\quartus_nativelink_simulation.log UART\physical\rcvr.bsf UART\physical\simulation\modelsim\cyclone_atoms.v UART\physical\simulation\modelsim\modelsim.ini UART\physical\simulation\modelsim\modelsim_work\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e\verilog.asm UART\physical\simulation\modelsim\modelsim_work\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e\_primary.dat UART\physical\simulation\modelsim\modelsim_work\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_and1\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_and1\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_and1\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_and16\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_and16\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_and16\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_asmiblock\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_asmiblock\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_asmiblock\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_io\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_io\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_io\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_lcell\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_lcell\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_lcell\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_b17mux21\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_b17mux21\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_b17mux21\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_b5mux21\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_b5mux21\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_b5mux21\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_bmux21\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_bmux21\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_bmux21\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_crcblock\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_crcblock\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_crcblock\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_dffe\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_dffe\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_dffe\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_dll\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_dll\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_dll\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_io\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_io\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_io\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_jtag\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_jtag\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_jtag\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_latch\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_latch\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_latch\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell_register\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell_register\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell_register\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_mux21\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_mux21\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_mux21\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_mux41\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_mux41\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_mux41\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_m_cntr\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_m_cntr\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_m_cntr\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_nmux21\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_nmux21\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_nmux21\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_n_cntr\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_n_cntr\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_n_cntr\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_pll\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_pll\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_pll\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_pll_reg\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_pll_reg\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_pll_reg\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_block\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_block\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_block\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_pulse_generator\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_pulse_generator\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_pulse_generator\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_register\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_register\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_register\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_routing_wire\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_routing_wire\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_routing_wire\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\cyclone_scale_cntr\verilog.asm UART\physical\simulation\modelsim\modelsim_work\cyclone_scale_cntr\_primary.dat UART\physical\simulation\modelsim\modelsim_work\cyclone_scale_cntr\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\uart_if_rom\verilog.asm UART\physical\simulation\modelsim\modelsim_work\uart_if_rom\_primary.dat UART\physical\simulation\modelsim\modelsim_work\uart_if_rom\_primary.vhd UART\physical\simulation\modelsim\modelsim_work\_info UART\physical\simulation\modelsim\transcript UART\physical\simulation\modelsim\uart_if.vo UART\physical\simulation\modelsim\uart_if_modelsim.xrf UART\physical\simulation\modelsim\uart_if_v.sdo UART\physical\simulation\modelsim\uart_post.cr.mti UART\physical\simulation\modelsim\uart_post.mpf UART\physical\simulation\modelsim\vsim.wlf UART\physical\simulation\modelsim\work\@p@r@i@m_@d@f@f@e\verilog.asm UART\physical\simulation\modelsim\work\@p@r@i@m_@d@f@f@e\_primary.dat UART\physical\simulation\modelsim\work\@p@r@i@m_@d@f@f@e\_primary.vhd UART\physical\simulation\modelsim\work\@u@a@r@t_tb\verilog.asm UART\physical\simulation\modelsim\work\@u@a@r@t_tb\_primary.dat UART\physical\simulation\modelsim\work\@u@a@r@t_tb\_primary.vhd UART\physical\simulation\modelsim\work\and1\verilog.asm UART\physical\simulation\modelsim\work\and1\_primary.dat UART\physical\simulation\modelsim\work\and1\_primary.vhd UART\physical\simulation\modelsim\work\and16\verilog.asm UART\physical\simulation\modelsim\work\and16\_primary.dat UART\physical\simulation\modelsim\work\and16\_primary.vhd UART\physical\simulation\modelsim\work\b17mux21\verilog.asm UART\physical\simulation\modelsim\work\b17mux21\_primary.dat UART\physical\simulation\modelsim\work\b17mux21\_primary.vhd UART\physical\simulation\modelsim\work\b5mux21\verilog.asm UART\physical\simulation\modelsim\work\b5mux21\_primary.dat UART\physical\simulation\modelsim\work\b5mux21\_primary.vhd UART\physical\simulation\modelsim\work\bmux21\verilog.asm UART\physical\simulation\modelsim\work\bmux21\_primary.dat UART\physical\simulation\modelsim\work\bmux21\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_asmiblock\verilog.asm UART\physical\simulation\modelsim\work\cyclone_asmiblock\_primary.dat UART\physical\simulation\modelsim\work\cyclone_asmiblock\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_asynch_io\verilog.asm UART\physical\simulation\modelsim\work\cyclone_asynch_io\_primary.dat UART\physical\simulation\modelsim\work\cyclone_asynch_io\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_asynch_lcell\verilog.asm UART\physical\simulation\modelsim\work\cyclone_asynch_lcell\_primary.dat UART\physical\simulation\modelsim\work\cyclone_asynch_lcell\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_crcblock\verilog.asm UART\physical\simulation\modelsim\work\cyclone_crcblock\_primary.dat UART\physical\simulation\modelsim\work\cyclone_crcblock\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_dll\verilog.asm UART\physical\simulation\modelsim\work\cyclone_dll\_primary.dat UART\physical\simulation\modelsim\work\cyclone_dll\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_io\verilog.asm UART\physical\simulation\modelsim\work\cyclone_io\_primary.dat UART\physical\simulation\modelsim\work\cyclone_io\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_jtag\verilog.asm UART\physical\simulation\modelsim\work\cyclone_jtag\_primary.dat UART\physical\simulation\modelsim\work\cyclone_jtag\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_lcell\verilog.asm UART\physical\simulation\modelsim\work\cyclone_lcell\_primary.dat UART\physical\simulation\modelsim\work\cyclone_lcell\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_lcell_register\verilog.asm UART\physical\simulation\modelsim\work\cyclone_lcell_register\_primary.dat UART\physical\simulation\modelsim\work\cyclone_lcell_register\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_pll\verilog.asm UART\physical\simulation\modelsim\work\cyclone_pll\_primary.dat UART\physical\simulation\modelsim\work\cyclone_pll\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_ram_block\verilog.asm UART\physical\simulation\modelsim\work\cyclone_ram_block\_primary.dat UART\physical\simulation\modelsim\work\cyclone_ram_block\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_ram_clear\verilog.asm UART\physical\simulation\modelsim\work\cyclone_ram_clear\_primary.dat UART\physical\simulation\modelsim\work\cyclone_ram_clear\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_ram_internal\verilog.asm UART\physical\simulation\modelsim\work\cyclone_ram_internal\_primary.dat UART\physical\simulation\modelsim\work\cyclone_ram_internal\_primary.vhd UART\physical\simulation\modelsim\work\cyclone_ram_register\verilog.asm UART\physical\simulation\modelsim\work\cyclone_ram_register\_primary.dat UART\physical\simulation\modelsim\work\cyclone_ram_register\_primary.vhd UART\physical\simulation\modelsim\work\dffe\verilog.asm UART\physical\simulation\modelsim\work\dffe\_primary.dat UART\physical\simulation\modelsim\work\dffe\_primary.vhd UART\physical\simulation\modelsim\work\latch\verilog.asm UART\physical\simulation\modelsim\work\latch\_primary.dat UART\physical\simulation\modelsim\work\latch\_primary.vhd UART\physical\simulation\modelsim\work\mux21\verilog.asm UART\physical\simulation\modelsim\work\mux21\_primary.dat UART\physical\simulation\modelsim\work\mux21\_primary.vhd UART\physical\simulation\modelsim\work\mux41\verilog.asm UART\physical\simulation\modelsim\work\mux41\_primary.dat UART\physical\simulation\modelsim\work\mux41\_primary.vhd UART\physical\simulation\modelsim\work\m_cntr\verilog.asm UART\physical\simulation\modelsim\work\m_cntr\_primary.dat UART\physical\simulation\modelsim\work\m_cntr\_primary.vhd UART\physical\simulation\modelsim\work\nmux21\verilog.asm UART\physical\simulation\modelsim\work\nmux21\_primary.dat UART\physical\simulation\modelsim\work\nmux21\_primary.vhd UART\physical\simulation\modelsim\work\n_cntr\verilog.asm UART\physical\simulation\modelsim\work\n_cntr\_primary.dat UART\physical\simulation\modelsim\work\n_cntr\_primary.vhd UART\physical\simulation\modelsim\work\pll_reg\verilog.asm UART\physical\simulation\modelsim\work\pll_reg\_primary.dat UART\physical\simulation\modelsim\work\pll_reg\_primary.vhd UART\physical\simulation\modelsim\work\rcvr\verilog.asm UART\physical\simulation\modelsim\work\rcvr\_primary.dat UART\physical\simulation\modelsim\work\rcvr\_primary.vhd UART\physical\simulation\modelsim\work\scale_cntr\verilog.asm UART\physical\simulation\modelsim\work\scale_cntr\_primary.dat UART\physical\simulation\modelsim\work\scale_cntr\_primary.vhd UART\physical\simulation\modelsim\work\txmit\verilog.asm UART\physical\simulation\modelsim\work\txmit\_primary.dat UART\physical\simulation\modelsim\work\txmit\_primary.vhd UART\physical\simulation\modelsim\work\uart\verilog.asm UART\physical\simulation\modelsim\work\uart\_primary.dat UART\physical\simulation\modelsim\work\uart\_primary.vhd UART\physical\simulation\modelsim\work\uart_if\verilog.asm UART\physical\simulation\modelsim\work\uart_if\_primary.dat UART\physical\simulation\modelsim\work\uart_if\_primary.vhd UART\physical\simulation\modelsim\work\_info UART\physical\txmit.bsf UART\physical\uart.bsf UART\physical\uart_if.asm.rpt UART\physical\uart_if.bsf UART\physical\uart_if.cdf UART\physical\uart_if.done UART\physical\uart_if.eda.rpt UART\physical\uart_if.fit.eqn UART\physical\uart_if.fit.rpt UART\physical\uart_if.fit.summary UART\physical\uart_if.fld UART\physical\uart_if.flow.rpt UART\physical\uart_if.map.eqn UART\physical\uart_if.map.rpt UART\physical\uart_if.map.summary UART\physical\uart_if.pin UART\physical\uart_if.pof UART\physical\uart_if.ppl UART\physical\uart_if.qpf UART\physical\uart_if.qsf UART\physical\uart_if.qws UART\physical\uart_if.sim.rpt UART\physical\uart_if.sof UART\physical\uart_if.tan.rpt UART\physical\uart_if.tan.summary UART\physical\uart_if_assignment_defaults.qdf UART\physical\uart_if_description.txt UART\physical\uart_if_rom.bdf UART\physical\uart_rom.bsf UART\physical\uart_rom.mif UART\physical\uart_rom.v UART\physical\uart_rom_bb.v UART\physical\vga.vhd UART\physical\vga_vl.bsf UART\Src\div1_8m.bsf UART\Src\div1_8m.v UART\Src\filter.bsf UART\Src\filter.v UART\Src\rcvr.v UART\Src\rcvr_tf.v UART\Src\txmit.v UART\Src\txmit_tf.v UART\Src\uart.v UART\Src\uart_if.v UART\Src\uart_if_fixed.v UART\Src\uart_tb.v UART\sythesis\lec\uart_if.vlc UART\sythesis\lec\uart_if.vmc UART\sythesis\lec\uart_if.vsc UART\sythesis\rpt_uart_if.areasrr UART\sythesis\syntmp\uart_if.msg UART\sythesis\syntmp\uart_if.plg UART\sythesis\UART.prd UART\sythesis\UART.prj UART\sythesis\uart_if.fse UART\sythesis\uart_if.srd UART\sythesis\uart_if.srm UART\sythesis\uart_if.srr UART\sythesis\uart_if.srs UART\sythesis\uart_if.sxr UART\sythesis\uart_if.tcl UART\sythesis\uart_if.tlg UART\sythesis\uart_if.vqm UART\sythesis\uart_if.vtc UART\sythesis\uart_if.xrf UART\sythesis\uart_if_cons.tcl UART\sythesis\uart_if_rm.tcl UART\sythesis\verif\uart_if.vif UART\physical\simulation\modelsim\modelsim_work\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e UART\physical\simulation\modelsim\modelsim_work\cyclone_and1 UART\physical\simulation\modelsim\modelsim_work\cyclone_and16 UART\physical\simulation\modelsim\modelsim_work\cyclone_asmiblock UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_io UART\physical\simulation\modelsim\modelsim_work\cyclone_asynch_lcell UART\physical\simulation\modelsim\modelsim_work\cyclone_b17mux21 UART\physical\simulation\modelsim\modelsim_work\cyclone_b5mux21 UART\physical\simulation\modelsim\modelsim_work\cyclone_bmux21 UART\physical\simulation\modelsim\modelsim_work\cyclone_crcblock UART\physical\simulation\modelsim\modelsim_work\cyclone_dffe UART\physical\simulation\modelsim\modelsim_work\cyclone_dll UART\physical\simulation\modelsim\modelsim_work\cyclone_io UART\physical\simulation\modelsim\modelsim_work\cyclone_jtag UART\physical\simulation\modelsim\modelsim_work\cyclone_latch UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell UART\physical\simulation\modelsim\modelsim_work\cyclone_lcell_register UART\physical\simulation\modelsim\modelsim_work\cyclone_mux21 UART\physical\simulation\modelsim\modelsim_work\cyclone_mux41 UART\physical\simulation\modelsim\modelsim_work\cyclone_m_cntr UART\physical\simulation\modelsim\modelsim_work\cyclone_nmux21 UART\physical\simulation\modelsim\modelsim_work\cyclone_n_cntr UART\physical\simulation\modelsim\modelsim_work\cyclone_pll UART\physical\simulation\modelsim\modelsim_work\cyclone_pll_reg UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_block UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_pulse_generator UART\physical\simulation\modelsim\modelsim_work\cyclone_ram_register UART\physical\simulation\modelsim\modelsim_work\cyclone_routing_wire UART\physical\simulation\modelsim\modelsim_work\cyclone_scale_cntr UART\physical\simulation\modelsim\modelsim_work\uart_if_rom UART\physical\simulation\modelsim\work\@p@r@i@m_@d@f@f@e UART\physical\simulation\modelsim\work\@u@a@r@t_tb UART\physical\simulation\modelsim\work\and1 UART\physical\simulation\modelsim\work\and16 UART\physical\simulation\modelsim\work\b17mux21 UART\physical\simulation\modelsim\work\b5mux21 UART\physical\simulation\modelsim\work\bmux21 UART\physical\simulation\modelsim\work\cyclone_asmiblock UART\physical\simulation\modelsim\work\cyclone_asynch_io UART\physical\simulation\modelsim\work\cyclone_asynch_lcell UART\physical\simulation\modelsim\work\cyclone_crcblock UART\physical\simulation\modelsim\work\cyclone_dll UART\physical\simulation\modelsim\work\cyclone_io UART\physical\simulation\modelsim\work\cyclone_jtag UART\physical\simulation\modelsim\work\cyclone_lcell UART\physical\simulation\modelsim\work\cyclone_lcell_register UART\physical\simulation\modelsim\work\cyclone_pll UART\physical\simulation\modelsim\work\cyclone_ram_block UART\physical\simulation\modelsim\work\cyclone_ram_clear UART\physical\simulation\modelsim\work\cyclone_ram_internal UART\physical\simulation\modelsim\work\cyclone_ram_register UART\physical\simulation\modelsim\work\dffe UART\physical\simulation\modelsim\work\latch UART\physical\simulation\modelsim\work\mux21 UART\physical\simulation\modelsim\work\mux41 UART\physical\simulation\modelsim\work\m_cntr UART\physical\simulation\modelsim\work\nmux21 UART\physical\simulation\modelsim\work\n_cntr UART\physical\simulation\modelsim\work\pll_reg UART\physical\simulation\modelsim\work\rcvr UART\physical\simulation\modelsim\work\scale_cntr UART\physical\simulation\modelsim\work\txmit UART\physical\simulation\modelsim\work\uart UART\physical\simulation\modelsim\work\uart_if UART\physical\simulation\modelsim\modelsim_work UART\physical\simulation\modelsim\work UART\func_sim\work\@u@a@r@t_tb UART\func_sim\work\rcvr UART\func_sim\work\txmit UART\func_sim\work\uart UART\func_sim\work\uart_if UART\physical\simulation\modelsim UART\func_sim\work UART\physical\db UART\physical\simulation UART\sythesis\db UART\sythesis\lec UART\sythesis\syntmp UART\sythesis\verif UART\Doc UART\func_sim UART\physical UART\Src UART\sythesis UART