[VHDL编程] xapp134_vhdl

说明：The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.-err
<ronsullivan> 在 2025-01-23 上传 | 大小：2.51mb | 下载：0

[VHDL编程] spi_latest.tar

说明：用verilog HDL编写的SPI控制器，从国外网站上找到的。-SPI (Serial Peripheral Interface) is serial, synchronous, full duplex communication protocol. It is widely used as a board-level interface between different devices such as microcontrolle
<gsh> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] spi_latest[1].tar

说明：serial peripheral interface master interface Wishbone compatible
<hr> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] spi_latest.tar

说明：spi接口 verilog版本, Synchronous serial interfaces are widely used to provide economical board-level interfaces between different devices such as microcontrollers, DACs, ADCs and other. Although there is no single standard f
<shen> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] NFC-for-Mobile-Phones

说明：在手机设计方案中采用NFC架构和技术的实现方法-The use of mobile phone design in architecture and technology NFC Implementation
<Shen Fei> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] PLD-LOGIC_SPWM

说明：电子设计竞赛中获二等奖，在FPGA中实现的两路自然采样SPWM，原理图输入法设计，1024*八位正弦查找表，带FSK和ASK调制功能，频率范围8KHz~12KHz.-Electronic Design Competition second prize in the FPGA to achieve the two natural sampling SPWM, schematic design input, 1024* eight sine
<zlz> 在 2025-01-23 上传 | 大小：2.51mb | 下载：0

[VHDL编程] DDS-SIN

说明：用verilog语言实现DDS的正弦波发送-DDS sine wave sent verilog language
<牛倩> 在 2025-01-23 上传 | 大小：2.51mb | 下载：0

[VHDL编程] spi_latest.tar

说明：This IP provides specifications for the SPI (Serial Peripheral Interface) Master core. Synchronous serial interfaces are widely used to provide economical board-level interfaces between different devices such as microcon
<qingmingyang> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] inv_matrix

说明：矩阵求逆模块硬件实现,用verilog语言，基于ISE开发环境-implement of inverse matrix
<allensmith88> 在 2025-01-23 上传 | 大小：2.51mb | 下载：0

[VHDL编程] response_time

说明：在fpga开发板上实现一个测试人的反映速度的功能，当灯亮时，按下按键，灯灭，然后数码管显示灯从亮到灭的时间，也就是人的反应时间-In fpga development board to implement a test reflect the speed of people' s function, when lights, press the button, the lamp is off, then the digital d
<郑大伟> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] msp430f5529_digital_clock

说明：这是一份msp430f5529开发板的数字钟例程，实现了数字时时钟，指针式时钟，背光调整等一系列完善的功能-This is a digital clock routine of msp430f5529, it has digital clock, pointer type clock, backlight adjustment and a series of perfect functions
<tanxiaoyao> 在 2025-01-23 上传 | 大小：2.5mb | 下载：0

[VHDL编程] CPU

说明：设计一个简易cpu，包含指令集，能够实现有限指令的操作，具体见内部文档-Design a simplified CPU that has its own instructions which it can work with.
<韦壮焜> 在 2025-01-23 上传 | 大小：2.51mb | 下载：0