资源列表
[VHDL编程] adjustable-signal-generator
说明:这是一个可调的信号发生器,可产生正弦波,矩形波,三角波,用SignalTap II 仿真 -This is an adjustable signal generator, can produce sine, square wave, triangle wave, with the SignalTap II simulation<joke> 在 2025-01-23 上传 | 大小:2.54mb | 下载:0
[VHDL编程] clock-with-alarm-and-timer
说明:黑金EP2C5QC808N系列,Quartus 11.0 中编译综合的数字钟,具有实时时钟运行,时钟校准,整点报时以及定时提醒功能,包含全部的工程文件。-Black EP2C5QC808N series, Quartus 11 compilation and synthesis of digital clock, with real-time clock operation, calibration of the clock, the<姜伟> 在 2025-01-23 上传 | 大小:2.54mb | 下载:0
[VHDL编程] FPGA-_control_DM9000A-Ethernet
说明:FPGA控制网口芯片DM9000A进行以太网传输数据。-The FPGA control network port chip the DM9000A Ethernet transmission data.<唐希> 在 2025-01-23 上传 | 大小:2.53mb | 下载:0
[VHDL编程] Ethernet_Accel_Design
说明:altera官方以太网例程(基于niosII)-Accelerating Nios II Ethernet Applications User Guide<王焱> 在 2025-01-23 上传 | 大小:2.53mb | 下载:1
[VHDL编程] Counter8bit
说明:This is an 8 bit Up Counter coded using Verilog HDL. Bus width can be edited to your desired specs.<Patrick Go> 在 2025-01-23 上传 | 大小:2.53mb | 下载:0
[VHDL编程] FPGA-basic-knowlodge
说明:本书主要包含四部分内容:FPGA简介,FPGA最小系统,FPGA最小系统的硬件设计,FPGA最小系统的程序设计。-This book consists of four parts: FPGA Profile, FPGA minimum system hardware design FPGA minimum system, FPGA minimum system programming.<吕明哲> 在 2025-01-23 上传 | 大小:2.54mb | 下载:0
[VHDL编程] clock-with-alarm-and-timer
说明:FPGA example, the timer buzzer. Can learn the FPGA involved in the grammar!-FPGA example, the timer buzzer. Can learn the FPGA involved in the grammar!<mayuan> 在 2025-01-23 上传 | 大小:2.53mb | 下载:0