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[VHDL编程] multiplier_booths
说明:a verilog code for booths multiplier has been uploaded, simple architecture.<JK> 在 2024-11-16 上传 | 大小:1kb | 下载:0
[VHDL编程] cordic
说明:This attachment consists of the coordinate rotation digital computer algorithm code which is most use algorithm in signal processing<bharat kumar> 在 2024-11-16 上传 | 大小:1kb | 下载:0
[VHDL编程] fir1
说明:this file consists of simple FIR filter designed with the fixed coefficients<bharat kumar> 在 2024-11-16 上传 | 大小:1kb | 下载:0
[VHDL编程] Clock_generator
说明:Verilog source code for a clock generator<austin> 在 2024-11-16 上传 | 大小:1kb | 下载:0