[VHDL编程] Elliptic_Curve_Group_latest.tar

说明：椭圆曲线群的核心是计算在椭圆曲线群的两个元素的加入，并在椭圆曲线组相同的元素的加入。-The Elliptic Curve Group core is for computing the addition of two elements in the elliptic curve group, and the addition of identical elements in the elliptic curve group.
<ke> 在 2025-02-05 上传 | 大小：567kb | 下载：0

[VHDL编程] Tate_Bilinear_Pairing_latest.tar

说明：The Tate Bilinear Pairing core is for calculating Tate bilinear pairing especially on super-singular elliptic curve in affine coordinates defined over a Galois field , whose irreducible polynomial is . (For improving
<ke> 在 2025-02-05 上传 | 大小：482kb | 下载：0

[VHDL编程] tiny_tate_bilinear_pairing_latest.tar

说明：Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing called reduced pairing.-Tiny Tate Bilinear Pairing core is for calculating a special type of Tate bilinear pairing calle
<ke> 在 2025-02-05 上传 | 大小：1.07mb | 下载：0

[VHDL编程] openmsp430_latest.tar

说明：The openMSP430 is a 16-bit microcontroller core compatible with TI s MSP430 family (note that the extended version of the architecture, the MSP430X, isn t supported by this IP). It is based on a Von Neumann archite
<ke> 在 2025-02-05 上传 | 大小：36.25mb | 下载：0

[VHDL编程] Amber_ARM-compatible_core_latest.tar

说明：The Amber processor core is an ARM-compatible 32-bit RISC processor. The Amber core is fully compatible with the ARM ® v2a instruction set architecture (ISA) and is therefore supported by the GNU toolset. This
<ke> 在 2025-02-05 上传 | 大小：3.44mb | 下载：0

[VHDL编程] t400u_latest.tar

说明：The T400u controller is an implementation of National s 4-bit COP400 microcontroller family architecture. It is intended to be used as a replacement for the original chip in SOCs recreating legacy systems. Its final
<ke> 在 2025-02-05 上传 | 大小：502kb | 下载：0

[VHDL编程] t48u_latest.tar

说明：The T48 μController core is an implementation of the MCS-48 microcontroller family ar-chitecture. While being a controller core for SoC, it also aims for code-compatability and cycle-accuracy so that it can be used as
<ke> 在 2025-02-05 上传 | 大小：4.01mb | 下载：0

[VHDL编程] jiance1

说明：3异或条件输出 周期的伪随机数生成器伪随机数 -The XOR output cycle pseudo-random number generator
<陈治斌> 在 2025-02-05 上传 | 大小：1kb | 下载：0

[VHDL编程] 数码管 Verilog

说明：verilog 设计电路将计算结果显示在数码管上
<yanpengzhan> 在 2013-03-02 上传 | 大小：1.12kb | 下载：0

[VHDL编程] final_PLL_130T_240Mhz

说明：Verilog 调试LMX2541，上板测试正常！单频输出，SPI方式控制。-Verilog debugging the LMX2541, on board test normal! Single-frequency output SPI control.
<lianggui> 在 2025-02-05 上传 | 大小：2.14mb | 下载：0

[VHDL编程] sobel2

说明：新的sobel算子的FPGA实现。使用verilog语言，并调试通过~-The sobel operator new FPGA implementation. Verilog language, and debugging through to
<abrams> 在 2025-02-05 上传 | 大小：348kb | 下载：0

[VHDL编程] median_filter

说明：中值滤波的verilog实现，完整工程，调试通过-Median filter verilog achieve complete engineering, debugging through
<abrams> 在 2025-02-05 上传 | 大小：2.75mb | 下载：0