[VHDL编程] shift_arr

说明：This contains the shift array which can be used in 2D DCT with help of 2 1D DCTs.
<Prashanth> 在 2025-02-08 上传 | 大小：2kb | 下载：0

[VHDL编程] PLB_MG

说明：PLB Macrogate in VHDL
<Prashanth> 在 2025-02-08 上传 | 大小：1kb | 下载：0

[VHDL编程] Killswitch

说明：这是用来KILLSWITCH的开关， 是采用汇编语言的编写。-This is used to to KILLSWITCH the switch, and is written in assembly language.
<Yuhua> 在 2025-02-08 上传 | 大小：10kb | 下载：0

[VHDL编程] FIFO

说明：FIFO在VHDL上的实现。没有注释，较为完善，已通过编译。-FIFO implementations in VHDL. No comment, more perfect, has compiled.
<duan> 在 2025-02-08 上传 | 大小：1kb | 下载：0

[VHDL编程] fpga

说明：FPGA开发基础例程实验代码，来自特权同学，十分实用，通俗易懂。-The FPGA development foundation routine experimental code from a privileged students, very practical, easy to understand.
<wu_xiaofeng> 在 2025-02-08 上传 | 大小：13.52mb | 下载：0

[VHDL编程] Verilog_IIC

说明：利用EP2C8Q208的FPGA芯片，利用Verilog硬件描述语言，实现对AT24C02的EEPROM进行读写操作。-The use of EP2C8Q208 FPGA chip, using the Verilog hardware descr iption language, the realization the AT24C02 of the EEPROM read and write operations.
<tanyu> 在 2025-02-08 上传 | 大小：668kb | 下载：0

[VHDL编程] FPGA_RS232

说明：FPGA芯片,利用Verilog硬件描述语言实现与PC电脑通信功能。-FPGA chip, the Verilog hardware descr iption language and PC computer communication function.
<tanyu> 在 2025-02-08 上传 | 大小：502kb | 下载：0

[VHDL编程] test_ddr2_mem_model

说明：ddr2 test bench top for altera fpga.-ddr2 test bench top for fpga.
<ShengbingChou> 在 2025-02-08 上传 | 大小：4kb | 下载：0

[VHDL编程] sap_latest.tar

说明：This 8-bit microprocessor with 5 instructions. It is based on 8080 architecture. This architecture called SAP for Simple-As-Possible computer. It very useful design which introduces most of the basic and fundamental idea
<gollasantu> 在 2025-02-08 上传 | 大小：5.45mb | 下载：0

[VHDL编程] fast-crc_latest.tar

说明：A 32-bit parallel and highly pipelined Cyclic Redundancy Code (CRC) generator is presented. The design can handle 5 different channels at an input rate of 2Gbps each (the total output throughput is 5x4Gbps.)
<gollasantu> 在 2025-02-08 上传 | 大小：4.55mb | 下载：0

[VHDL编程] viterb_encoder_and_decoder_latest.tar

说明：Category: Arithmetic core Language: Verilog Development status: Mature Additional info: Design done, Specification done WishBone Compliant: No
<gollasantu> 在 2025-02-08 上传 | 大小：448kb | 下载：0

[VHDL编程] fpu100_latest.tar

说明：Features - FPU supports the following arithmetic operations: - Add - Subtract - Multiply - Divide - Square Root
<gollasantu> 在 2025-02-08 上传 | 大小：1.88mb | 下载：0