资源列表
[VHDL编程] example7_jtd
说明:VHDL实现交通灯,通过分频操作实现对灯的控制和延时,运用的多种分频时钟来控制进程。-VHDL to achieve traffic lights, through the frequency control and the frequency of the lamp control and delay, the use of a variety of frequency control clock to control the pro<张琼> 在 2024-10-13 上传 | 大小:27648 | 下载:0
[VHDL编程] example8_dianzhen
说明:VHDL实现点阵的操作,通过利用字模软件来得到汉字的二进制码后放到程序当中,在显示的同时数码管会相应的显示汉字所对应的字符。-VHDL implementation of the lattice operations, through the use of matrix software comes to the character of the binary code into the program in display also<张琼> 在 2024-10-13 上传 | 大小:27648 | 下载:0
[VHDL编程] P137_4_12_odd_even
说明:vhdl实现奇数和偶数的分频,因偶数的分频有很多历程,但奇数的分析较为繁琐,故将此结合到一起便于分析操作和分析。-VHDL to achieve the odd and even frequency, the frequency of the Division has a lot of history, but the odd number of analysis is more cumbersome, it will be combi<张琼> 在 2024-10-13 上传 | 大小:311296 | 下载:0
[VHDL编程] fir_filter
说明:基于d builder的fir滤波器的设计;fpga高级编程-Based dspbuilder of fir filter design fpga Advanced Programming<程序猿> 在 2024-10-13 上传 | 大小:12122112 | 下载:0
[VHDL编程] music_player
说明:基于d builder的音乐播放器的设计;FPGA与matlab联合编程;-Dsp builder based music player design FPGA and matlab joint programming<程序猿> 在 2024-10-13 上传 | 大小:2124800 | 下载:0
[VHDL编程] clock_gyc_system
说明:基于用户自定义模块的实时时钟的设计;Qsys硬件设计;-Custom real-time clock module-based design Qsys hardware design<程序猿> 在 2024-10-13 上传 | 大小:18898944 | 下载:0
[VHDL编程] SensorTemperatura
说明:Temperature sensor of a FPGA nexys 4 on verilog languaje<Andruans> 在 2024-10-13 上传 | 大小:342016 | 下载:0