资源列表
[VHDL编程] spreadspectrum1
说明:these are verilog files but i am uploading in text(notepad) format<shiva> 在 2025-01-24 上传 | 大小:1kb | 下载:0
[VHDL编程] spreadspectrum2
说明:these files are written in verilog but i am uploading in text format<shiva> 在 2025-01-24 上传 | 大小:1kb | 下载:0
[VHDL编程] spreadspectrum3
说明:these files are written in verilog but i am uploading in text format<shiva> 在 2025-01-24 上传 | 大小:1kb | 下载:0
[VHDL编程] spreadspectrum4
说明:these files are written in verilog but i am uploading in text format<shiva> 在 2025-01-24 上传 | 大小:1kb | 下载:0
[VHDL编程] spreadspectrum5
说明:these files are written in verilog but i am uploading in text format<shiva> 在 2025-01-24 上传 | 大小:4kb | 下载:0
[VHDL编程] HuaweiFPGAdesignflowguide
说明:华为内部的FPGA设计培训教程,详细阐述了设计流程图、Verilog HDL设计、逻辑仿真、逻辑综合。对大家的学习一定有帮助的。-Huawei within the FPGA design training tutorial, a detailed flow chart of the design, Verilog HDL design, logic simulation, logic synthesis. Study of the U<张芸> 在 2025-01-24 上传 | 大小:34kb | 下载:0
[VHDL编程] The_entire_FPGA_design_flow_Modelsim_Synplify.Pro_
说明:详细的说明了FPGA设计的整个流程 FPGA设计全流程Modelsim>>Synplify.Pro>>ISE-Detailed descr iption of the FPGA design flow of the entire FPGA design flow full Modelsim> > Synplify.Pro> > ISE<张芸> 在 2025-01-24 上传 | 大小:213kb | 下载:0