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[VHDL编程vhdl-pipeline-mips_latest.tar

说明:pipeline mips in vhdl
<aliakbar> 在 2025-03-04 上传 | 大小:1.08mb | 下载:0

[VHDL编程rfid_latest.tar

说明:rfid tag and reader with VHDL for FPGA
<aliakbar> 在 2025-03-04 上传 | 大小:1.5mb | 下载:0

[VHDL编程Constraint-Based-Verification

说明:系統化驗証方法及實例探討Assertion, Constraint synthesis-Electronic Design complexity getting higher, the verification work needs to be fully understood
<samuel chuang> 在 2025-03-04 上传 | 大小:1.57mb | 下载:1

[VHDL编程cf_fft_latest.tar

说明:The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers. This FFT can perform calculations on continuous streaming data
<amin> 在 2025-03-04 上传 | 大小:2.98mb | 下载:0

[VHDL编程system05_latest.tar

说明:6805 compatible CPU Core 6805 compatible core - 4 x 8 bit Parallel I/O ports - Dual 8 bit Timer - MiniUART compatible with 6850 ACIA. - Runs with an E clock of 12.5MHz and system clock of 25MHz
<amin> 在 2025-03-04 上传 | 大小:29kb | 下载:0

[VHDL编程fpu100_latest.tar

说明:This a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Stan
<amin> 在 2025-03-04 上传 | 大小:1.88mb | 下载:0

[VHDL编程zorro_to_wishbone_bridge_latest.tar

说明:This project intends to create a bridge between Wishbone and the Amiga Zorro II and Zorro III busses. As in the Amiga 3000/4000 computer families, it is intended to support both the Zorro II and Zorro III protocols at th
<amin> 在 2025-03-04 上传 | 大小:10kb | 下载:0

[VHDL编程i2cslave

说明:此代码是I2C Slave的Verilog源代码,已经经过上板调试,没问题。-This code is the I2C Slave of Verilog source code, has been on the board debugging, no problem.
<Evan Xie> 在 2025-03-04 上传 | 大小:1.2mb | 下载:0

[VHDL编程PS2

说明:此代码是PS2键盘的Verilog程序,键盘的字符可显示在LCD 1602上,经上板调试程序是可行的-This code is a PS2 keyboard Verilog program, keyboard characters can be displayed on the LCD 1602, after the board debug process is feasible
<Evan Xie> 在 2025-03-04 上传 | 大小:9kb | 下载:0

[VHDL编程YCbCr2RGB_O

说明:此代码是把YUV转成RGB的Verilog程序,多谢下载-This code is to convert RGB to YUV Verilog program, thank you download
<Evan Xie> 在 2025-03-04 上传 | 大小:1kb | 下载:0

[VHDL编程sdram

说明:文件中包含Sdram的Verilog程序以及很全的Sdram的资料-Sdram the Verilog file contains procedures and information are all of Sdram
<Evan Xie> 在 2025-03-04 上传 | 大小:3.55mb | 下载:0

[VHDL编程AlteraFPGACPLDcoder

说明:Altera FPGA/CPLD设计(基础篇)随书代码-Altera FPGA/CPLD design (fundamental) with the code book
<李磊> 在 2025-03-04 上传 | 大小:8.38mb | 下载:0
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