文件名称:Digital-Design-with-CPLD-Part2
- 所属分类:
- VHDL编程
- 资源属性:
- [ASM] [源码]
- 上传时间:
- 2012-11-26
- 文件大小:
- 35.35mb
- 下载次数:
- 0次
- 提 供 者:
- Chris******
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Digital Design with CPLD Part2
PDF document with examples
PDF document with examples
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Student_Lab_Files\Debouncer\debouncer.vhd
.................\Lab13\clkdiv1.vhd
.................\.....\clkdiv1a.vhd
.................\.....\clkdiv2.vhd
.................\.....\clkdiv2a.vhd
.................\....4\clkdiv3.vhd
.................\.....\clkdiv3a.vhd
.................\.....\clkdiv4.vhd
.................\.....\clkdiv4a.vhd
.................\....5\clkdiv1.vhd
.................\.....\clkdiv1a.vhd
.................\.....\clkdiv2.vhd
.................\.....\clkdiv2a.vhd
.................\lab34\rom_init.mif
.................\....6\risc8v1\accumulator.vhd
.................\.....\.......\address_mux.vhd
.................\.....\.......\alu.vhd
.................\.....\.......\cmp_state.ini
.................\.....\.......\controller_v1.vhd
.................\.....\.......\data_mux.vhd
.................\.....\.......\.b\risc8v1-sim.vwf
.................\.....\.......\..\risc8v1.asm.qmsg
.................\.....\.......\..\risc8v1.csf.qmsg
.................\.....\.......\..\risc8v1.db_info
.................\.....\.......\..\risc8v1.fit.qmsg
.................\.....\.......\..\risc8v1.hif
.................\.....\.......\..\risc8v1.map.qmsg
.................\.....\.......\..\risc8v1.psf.hdb
.................\.....\.......\..\risc8v1.risc8v1.atom_entries.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.csf.rdb
.................\.....\.......\..\risc8v1.risc8v1.db_entries.csf.cdb
.................\.....\.......\..\risc8v1.risc8v1.sgate_entries.csf.cdb
.................\.....\.......\..\risc8v1.risc8v1.sgate_entries.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.sld_design_entry.sci
.................\.....\.......\..\risc8v1.risc8v1.ssf.hdb
.................\.....\.......\..\risc8v1.risc8v1.ssf.rdb
.................\.....\.......\..\risc8v1.risc8v1.tdb_netlist.csf.tdb
.................\.....\.......\..\risc8v1.risc8v1.tim_manager.csf.ddb
.................\.....\.......\..\risc8v1.sim.qmsg
.................\.....\.......\..\risc8v1.tan.qmsg
.................\.....\.......\..\risc8v1_cmp.qrpt
.................\.....\.......\..\risc8v1_hier_info
.................\.....\.......\..\risc8v1_sim.qrpt
.................\.....\.......\..\risc8v1_syn_hier_info
.................\.....\.......\debug.fsf
.................\.....\.......\instruction_register.vhd
.................\.....\.......\lpm_rom0.bsf
.................\.....\.......\lpm_rom0.cmp
.................\.....\.......\lpm_rom0.inc
.................\.....\.......\lpm_rom0.vhd
.................\.....\.......\lpm_rom0_inst.vhd
.................\.....\.......\lpm_rom1.bsf
.................\.....\.......\lpm_rom1.cmp
.................\.....\.......\lpm_rom1.inc
.................\.....\.......\lpm_rom1.vhd
.................\.....\.......\lpm_rom1_inst.vhd
.................\.....\.......\memory_address_register.vhd
.................\.....\.......\memory_data_register.vhd
.................\.....\.......\output_register.vhd
.................\.....\.......\program.mif
.................\.....\.......\program2.mif
.................\.....\.......\program_counter.vhd
.................\.....\.......\release.fsf
.................\.....\.......\risc8v1.asm.rpt
.................\.....\.......\risc8v1.bdf
.................\.....\.......\risc8v1.bsf
.................\.....\.......\risc8v1.csf
.................\.....\.......\risc8v1.done
.................\.....\.......\risc8v1.eco
.................\.....\.......\risc8v1.fit.eqn
.................\.....\.......\risc8v1.fit.rpt
.................\.....\.......\risc8v1.map.eqn
.................\.....\.......\risc8v1.map.rpt
.................\.....\.......\risc8v1.pin
.................\.....\.......\risc8v1.pof
.................\.....\.......\risc8v1.psf
.................\.....\.......\risc8v1.quartus
.................\.....\.......\risc8v1.qws
.................\.....\.......\risc8v1.sim.rpt
.................\.....\.......\risc8v1.sof
.................\.....\.......\risc8v1.ssf
.................\.....\.......\risc8v1.tan.rpt
.................\.....\.......\risc8v1.vwf
............
.................\Lab13\clkdiv1.vhd
.................\.....\clkdiv1a.vhd
.................\.....\clkdiv2.vhd
.................\.....\clkdiv2a.vhd
.................\....4\clkdiv3.vhd
.................\.....\clkdiv3a.vhd
.................\.....\clkdiv4.vhd
.................\.....\clkdiv4a.vhd
.................\....5\clkdiv1.vhd
.................\.....\clkdiv1a.vhd
.................\.....\clkdiv2.vhd
.................\.....\clkdiv2a.vhd
.................\lab34\rom_init.mif
.................\....6\risc8v1\accumulator.vhd
.................\.....\.......\address_mux.vhd
.................\.....\.......\alu.vhd
.................\.....\.......\cmp_state.ini
.................\.....\.......\controller_v1.vhd
.................\.....\.......\data_mux.vhd
.................\.....\.......\.b\risc8v1-sim.vwf
.................\.....\.......\..\risc8v1.asm.qmsg
.................\.....\.......\..\risc8v1.csf.qmsg
.................\.....\.......\..\risc8v1.db_info
.................\.....\.......\..\risc8v1.fit.qmsg
.................\.....\.......\..\risc8v1.hif
.................\.....\.......\..\risc8v1.map.qmsg
.................\.....\.......\..\risc8v1.psf.hdb
.................\.....\.......\..\risc8v1.risc8v1.atom_entries.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.csf.rdb
.................\.....\.......\..\risc8v1.risc8v1.db_entries.csf.cdb
.................\.....\.......\..\risc8v1.risc8v1.sgate_entries.csf.cdb
.................\.....\.......\..\risc8v1.risc8v1.sgate_entries.csf.hdb
.................\.....\.......\..\risc8v1.risc8v1.sld_design_entry.sci
.................\.....\.......\..\risc8v1.risc8v1.ssf.hdb
.................\.....\.......\..\risc8v1.risc8v1.ssf.rdb
.................\.....\.......\..\risc8v1.risc8v1.tdb_netlist.csf.tdb
.................\.....\.......\..\risc8v1.risc8v1.tim_manager.csf.ddb
.................\.....\.......\..\risc8v1.sim.qmsg
.................\.....\.......\..\risc8v1.tan.qmsg
.................\.....\.......\..\risc8v1_cmp.qrpt
.................\.....\.......\..\risc8v1_hier_info
.................\.....\.......\..\risc8v1_sim.qrpt
.................\.....\.......\..\risc8v1_syn_hier_info
.................\.....\.......\debug.fsf
.................\.....\.......\instruction_register.vhd
.................\.....\.......\lpm_rom0.bsf
.................\.....\.......\lpm_rom0.cmp
.................\.....\.......\lpm_rom0.inc
.................\.....\.......\lpm_rom0.vhd
.................\.....\.......\lpm_rom0_inst.vhd
.................\.....\.......\lpm_rom1.bsf
.................\.....\.......\lpm_rom1.cmp
.................\.....\.......\lpm_rom1.inc
.................\.....\.......\lpm_rom1.vhd
.................\.....\.......\lpm_rom1_inst.vhd
.................\.....\.......\memory_address_register.vhd
.................\.....\.......\memory_data_register.vhd
.................\.....\.......\output_register.vhd
.................\.....\.......\program.mif
.................\.....\.......\program2.mif
.................\.....\.......\program_counter.vhd
.................\.....\.......\release.fsf
.................\.....\.......\risc8v1.asm.rpt
.................\.....\.......\risc8v1.bdf
.................\.....\.......\risc8v1.bsf
.................\.....\.......\risc8v1.csf
.................\.....\.......\risc8v1.done
.................\.....\.......\risc8v1.eco
.................\.....\.......\risc8v1.fit.eqn
.................\.....\.......\risc8v1.fit.rpt
.................\.....\.......\risc8v1.map.eqn
.................\.....\.......\risc8v1.map.rpt
.................\.....\.......\risc8v1.pin
.................\.....\.......\risc8v1.pof
.................\.....\.......\risc8v1.psf
.................\.....\.......\risc8v1.quartus
.................\.....\.......\risc8v1.qws
.................\.....\.......\risc8v1.sim.rpt
.................\.....\.......\risc8v1.sof
.................\.....\.......\risc8v1.ssf
.................\.....\.......\risc8v1.tan.rpt
.................\.....\.......\risc8v1.vwf
............