文件名称:ADDER
介绍说明--下载内容均来自于网络,请自行研究使用
verilog DHL编写的一位全加器,编译通过。稍作修改便可编程任意位加法器。-verilog DHL write a full adder, compiled by. Slight modifications can be programmed any adder.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ADDER\add.asm.rpt
.....\add.done
.....\add.fit.rpt
.....\add.fit.smsg
.....\add.fit.summary
.....\add.flow.rpt
.....\add.map.rpt
.....\add.map.summary
.....\add.pin
.....\add.pof
.....\add.qpf
.....\add.qsf
.....\add.qws
.....\add.sim.rpt
.....\add.sof
.....\add.tan.rpt
.....\add.tan.summary
.....\add.v
.....\add.v.bak
.....\add.vwf
ADDER
.....\add.done
.....\add.fit.rpt
.....\add.fit.smsg
.....\add.fit.summary
.....\add.flow.rpt
.....\add.map.rpt
.....\add.map.summary
.....\add.pin
.....\add.pof
.....\add.qpf
.....\add.qsf
.....\add.qws
.....\add.sim.rpt
.....\add.sof
.....\add.tan.rpt
.....\add.tan.summary
.....\add.v
.....\add.v.bak
.....\add.vwf
ADDER