文件名称:verilog-Design
介绍说明－－下载内容均来自于网络，请自行研究使用
英文的verilog设计手册，内容详尽，专业-Verilog design manual in English, detailed, professional
(系统自动生成,下载前可以参看下载内容)
下载文件列表
verilog-Design\coding_and_synthesis_with_verilog.pdf
..............\CummingsHDLCON1999_BehavioralDelays_Rev1_1.pdf
..............\CummingsHDLCON2000_RegProposal_rev1_1.pdf
..............\CummingsHDLCON2001_Verilog2001_rev1_3.pdf
..............\CummingsHDLCON2002_Parameters_rev1_2.pdf
..............\CummingsHDLCON2002_SystemVerilogPorts_rev1_1.pdf
..............\CummingsICU1997_VerilogCodingEfficiency_rev1_1.pdf
..............\CummingsSNUG1998SJ_FSM_rev1_1.pdf
..............\CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf
..............\CummingsSNUG1999SJ_fsm_perl_rev1_1.pdf
..............\CummingsSNUG1999SJ_SynthMismatch_rev1_1.pdf
..............\CummingsSNUG2000Boston_FSM_rev1_2.pdf
..............\CummingsSNUG2000SJ_NBA_rev1_2.pdf
..............\CummingsSNUG2001SJ_AsyncClk_rev1_1.pdf
..............\CummingsSNUG2002SJ_FIFO1_rev1_1.pdf
..............\CummingsSNUG2002SJ_FIFO2_rev1_1.pdf
..............\CummingsSNUG2002SJ_Resets_rev1_1.pdf
..............\readme.txt
verilog-Design
..............\CummingsHDLCON1999_BehavioralDelays_Rev1_1.pdf
..............\CummingsHDLCON2000_RegProposal_rev1_1.pdf
..............\CummingsHDLCON2001_Verilog2001_rev1_3.pdf
..............\CummingsHDLCON2002_Parameters_rev1_2.pdf
..............\CummingsHDLCON2002_SystemVerilogPorts_rev1_1.pdf
..............\CummingsICU1997_VerilogCodingEfficiency_rev1_1.pdf
..............\CummingsSNUG1998SJ_FSM_rev1_1.pdf
..............\CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf
..............\CummingsSNUG1999SJ_fsm_perl_rev1_1.pdf
..............\CummingsSNUG1999SJ_SynthMismatch_rev1_1.pdf
..............\CummingsSNUG2000Boston_FSM_rev1_2.pdf
..............\CummingsSNUG2000SJ_NBA_rev1_2.pdf
..............\CummingsSNUG2001SJ_AsyncClk_rev1_1.pdf
..............\CummingsSNUG2002SJ_FIFO1_rev1_1.pdf
..............\CummingsSNUG2002SJ_FIFO2_rev1_1.pdf
..............\CummingsSNUG2002SJ_Resets_rev1_1.pdf
..............\readme.txt
verilog-Design