文件名称:HDB3_CODER

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 187kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • twi****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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HDB3 verilog 编码模块 基于ISE10.1的HDB3编码模块实现。-HDB3 verilog ISE10.1
相关搜索: hdb3
verilog

(系统自动生成,下载前可以参看下载内容)

下载文件列表

HDB3_CODER\HDB3_CODE.bmp

..........\HDB3_CODER.gise

..........\HDB3_CODER.ise

..........\HDB3_CODER.ntrc_log

..........\HDB3_CODER.v

..........\HDB3_CODER.xise

..........\HDB3_CODER_tb.fdo

..........\HDB3_CODER_tb.udo

..........\HDB3_CODER_tb.v

..........\HDB3_CODER_tb_stx.prj

..........\HDB3_CODER_tb_wave.fdo

..........\...........xdb\tmp\ise\version

..........\..............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject

..........\..............\...\...\............\..................\.........\HDProject_StrTbl

..........\..............\...\...\............\..................\__stored_object_table__

..........\..............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl

..........\..............\...\...\............\.........\.......\RunOnce_tcl_StrTbl

..........\..............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main

..........\..............\...\...\............\................\................\dpm_project_main_StrTbl

..........\..............\...\...\............\................Gui\CViewSelector

..........\..............\...\...\............\...................\CViewSelector_StrTbl

..........\..............\...\...\............\...................\File-SynthesisOnly

..........\..............\...\...\............\...................\File-SynthesisOnly_StrTbl

..........\..............\...\...\............\...................\Library-SynthesisOnly

..........\..............\...\...\............\...................\Library-SynthesisOnly_StrTbl

..........\..............\...\...\............\...................\Process-BehavioralSim-

..........\..............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG

..........\..............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl

..........\..............\...\...\............\...................\Process-BehavioralSim-_StrTbl

..........\..............\...\...\............\...................\Process-SynthesisOnly-

..........\..............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG

..........\..............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl

..........\..............\...\...\............\...................\Process-SynthesisOnly-_StrTbl

..........\..............\...\...\............\...................\Source-BehavioralSim-AutoCompile

..........\..............\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl

..........\..............\...\...\............\...................\Source-SynthesisOnly-AutoCompile

..........\..............\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl

..........\..............\...\...\............\xreport\Gc_RvReportViewer-Current-Module

..........\..............\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl

..........\..............\...\...\............\.......\Gc_RvReportViewer-Module-Data-HDB3_CODER

..........\..............\...\...\............\.......\Gc_RvReportViewer-Module-Data-HDB3_CODER_StrTbl

..........\..............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default

..........\..............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl

..........\..............\...\...\..REGISTRY__\Autonym\regkeys

..........\..............\...\...\............\bitgen\regkeys

..........\..............\...\...\............\...init\regkeys

..........\..............\...\...\............\common\regkeys

..........\..............\...\...\............\.pldfit\regkeys

..........\..............\...\...\............\dumpngdio\regkeys

..........\..............\...\...\............\fuse\regkeys

..........\..............\...\...\............\HierarchicalDesign\HDProject\regkeys

..........\..............\...\...\............\..................\regkeys

..........\..............\...\...\............\hprep6\regkeys

..........\..............\...\...\............\idem\regkeys

..........\..............\...\...\............\libgen\r

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