文件名称:Viterbi_Verilog
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viterbi译码的verilog实现,提供相应的原程序代码和testbench
-viterbi decoder verilog implementation
-viterbi decoder verilog implementation
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下载文件列表
Viterbi_Verilog
...............\BMUwithACSU.v
...............\Control.v
...............\Delay_16_Cycle.v
...............\RAM.v
...............\SMUwithOP.v
...............\SPECIFICATION.doc
...............\SPECIFICATION.pdf
...............\Stack.v
...............\tb_top.v
...............\Top.v
...............\答辩讲义.ppt
...............\BMUwithACSU.v
...............\Control.v
...............\Delay_16_Cycle.v
...............\RAM.v
...............\SMUwithOP.v
...............\SPECIFICATION.doc
...............\SPECIFICATION.pdf
...............\Stack.v
...............\tb_top.v
...............\Top.v
...............\答辩讲义.ppt