文件名称:jpeg-codec-in-verilog-HDL
- 所属分类：
- VHDL编程
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 24kb
- 下载次数：
- 0次
- 提 供 者：
- jerry*****
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
jpeg codec in Verilog HDL.-jpeg Code decoding used by Verilog HDL。
(系统自动生成,下载前可以参看下载内容)
下载文件列表
jpeg编解码（verilogHDL）\add.v
........................\barrel_shifter.v
........................\cactable.v
........................\csa4.v
........................\csa5.v
........................\csa51.v
........................\csa52.v
........................\csa6.v
........................\dcdiff_htable.v
........................\dct.v
........................\dctctl.v
........................\dct_1d.v
........................\dqram64.v
........................\FA2.v
........................\FA5.v
........................\FAO.v
........................\FIFO64X24.v
........................\jpegctl.v
........................\JPEGen.v
........................\lactable.v
........................\packer.v
........................\scc2.v
........................\scc4.v
........................\sizetable.v
........................\smul.v
........................\sub.v
........................\transram64.v
........................\vlcctl.v
........................\zzscan.v
jpeg编解码（verilogHDL）
........................\barrel_shifter.v
........................\cactable.v
........................\csa4.v
........................\csa5.v
........................\csa51.v
........................\csa52.v
........................\csa6.v
........................\dcdiff_htable.v
........................\dct.v
........................\dctctl.v
........................\dct_1d.v
........................\dqram64.v
........................\FA2.v
........................\FA5.v
........................\FAO.v
........................\FIFO64X24.v
........................\jpegctl.v
........................\JPEGen.v
........................\lactable.v
........................\packer.v
........................\scc2.v
........................\scc4.v
........................\sizetable.v
........................\smul.v
........................\sub.v
........................\transram64.v
........................\vlcctl.v
........................\zzscan.v
jpeg编解码（verilogHDL）