文件名称:Oscilloscope
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The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it can be ported to other hardware. The circuits were designed on a Windows XP using the Xilinx WebPack 6.2 tool. The transfer of the design to the FPGA was carried out either with the Xilinx Impact tool through a parallel JTAG cable or with the Digilent Export utility through a USB JTAG cable.
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下载文件列表
Oscilloscope\Documents\Design Project Report.doc
............\.........\Design Project Report.pdf
............\.........\User's Manual.doc
............\.........\User's Manual.pdf
............\Oscilloscope\dig_osc.bit
............\Project_Files\acquisition.sch
............\.............\acquisition.sym
............\.............\automake.log
............\.............\dig_osc.sch
............\.............\dig_osc_summary.html
............\.............\doscope.dhp
............\.............\doscope.ise
............\.............\doscope.ise_ISE_Backup
............\.............\doscope2.bit
............\.............\doscope_ise6_bak.zip
............\.............\osc.ucf
............\.............\osc_ctrl.sym
............\.............\osc_ctrl.vhd
............\.............\rate2div.vhd
............\.............\s2pctrl.sym
............\.............\s2pctrl.vhd
............\.............\sr_tuner.vhd
............\.............\ssgdisp.vhd
............\.............\vga.sym
............\.............\vga.vhd
............\.............\vgamemory.sym
............\.............\vga_display.sch
............\.............\vga_display.sym
............\.............\vga_mem.vhd
............\.............\__projnav\acquisition_jhdparse_tcl.rsp
............\.............\.........\dig_osc_jhdparse_tcl.rsp
............\.............\.........\doscope.gfl
............\.............\.........\sumrpt_tcl.rsp
............\.............\.........\vga_display_jhdparse_tcl.rsp
............\.............\__projnav.log
............\.............\_xmsgs
............\.............\__projnav
............\Documents
............\Oscilloscope
............\Project_Files
Oscilloscope
............\.........\Design Project Report.pdf
............\.........\User's Manual.doc
............\.........\User's Manual.pdf
............\Oscilloscope\dig_osc.bit
............\Project_Files\acquisition.sch
............\.............\acquisition.sym
............\.............\automake.log
............\.............\dig_osc.sch
............\.............\dig_osc_summary.html
............\.............\doscope.dhp
............\.............\doscope.ise
............\.............\doscope.ise_ISE_Backup
............\.............\doscope2.bit
............\.............\doscope_ise6_bak.zip
............\.............\osc.ucf
............\.............\osc_ctrl.sym
............\.............\osc_ctrl.vhd
............\.............\rate2div.vhd
............\.............\s2pctrl.sym
............\.............\s2pctrl.vhd
............\.............\sr_tuner.vhd
............\.............\ssgdisp.vhd
............\.............\vga.sym
............\.............\vga.vhd
............\.............\vgamemory.sym
............\.............\vga_display.sch
............\.............\vga_display.sym
............\.............\vga_mem.vhd
............\.............\__projnav\acquisition_jhdparse_tcl.rsp
............\.............\.........\dig_osc_jhdparse_tcl.rsp
............\.............\.........\doscope.gfl
............\.............\.........\sumrpt_tcl.rsp
............\.............\.........\vga_display_jhdparse_tcl.rsp
............\.............\__projnav.log
............\.............\_xmsgs
............\.............\__projnav
............\Documents
............\Oscilloscope
............\Project_Files
Oscilloscope