文件名称:adder
介绍说明--下载内容均来自于网络,请自行研究使用
This the adder VHDL code, it contains input and output fild, also simulate file-adder
(系统自动生成,下载前可以参看下载内容)
下载文件列表
adder
.....\adder.vhd
.....\clockgenerator.vhd
.....\file_read.vhd
.....\file_write1.vhd
.....\indataA.txt
.....\indataB.txt
.....\outdata.txt
.....\tb_adder.vhd
.....\adder.vhd
.....\clockgenerator.vhd
.....\file_read.vhd
.....\file_write1.vhd
.....\indataA.txt
.....\indataB.txt
.....\outdata.txt
.....\tb_adder.vhd