文件名称:can
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can IP CORE .VERY GOOD AS A STUDY FILE-can IP CORE. VERY GOOD AS A STUDY FILE
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can
...\bench
...\.....\CVS
...\.....\...\Entries
...\.....\...\Repository
...\.....\...\Root
...\.....\verilog
...\.....\.......\can_testbench.v
...\.....\.......\can_testbench_defines.v
...\.....\.......\CVS
...\.....\.......\...\Entries
...\.....\.......\...\Repository
...\.....\.......\...\Root
...\.....\.......\timescale.v
...\CVS
...\...\Entries
...\...\Repository
...\...\Root
...\doc
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\src
...\...\...\CVS
...\...\...\...\Entries
...\...\...\...\Repository
...\...\...\...\Root
...\rtl
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\verilog
...\...\.......\can_acf.v
...\...\.......\can_bsp.v
...\...\.......\can_btl.v
...\...\.......\can_crc.v
...\...\.......\can_defines.v
...\...\.......\can_fifo.v
...\...\.......\can_ibo.v
...\...\.......\can_register.v
...\...\.......\can_registers.v
...\...\.......\can_register_asyn.v
...\...\.......\can_register_asyn_syn.v
...\...\.......\can_register_syn.v
...\...\.......\can_top.v
...\...\.......\CVS
...\...\.......\...\Entries
...\...\.......\...\Repository
...\...\.......\...\Root
...\...\.......\README.txt
...\sim
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\rtl_sim
...\...\.......\bin
...\...\.......\...\cds.lib
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\hdl.var
...\...\.......\...\INCA_libs
...\...\.......\...\.........\CVS
...\...\.......\...\.........\...\Entries
...\...\.......\...\.........\...\Repository
...\...\.......\...\.........\...\Root
...\...\.......\...\.........\worklib
...\...\.......\...\.........\.......\CVS
...\...\.......\...\.........\.......\...\Entries
...\...\.......\...\.........\.......\...\Repository
...\...\.......\...\.........\.......\...\Root
...\...\.......\...\.........\.......\dir_keeper
...\...\.......\...\memory_file_list
...\...\.......\...\rtl_file_list
...\...\.......\...\sim_file_list
...\...\.......\CVS
...\...\.......\...\Entries
...\...\.......\...\Repository
...\...\.......\...\Root
...\...\.......\log
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\dir_keeper
...\...\.......\out
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\dir_keeper
...\...\.......\run
...\...\.......\...\clean
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\bench
...\.....\CVS
...\.....\...\Entries
...\.....\...\Repository
...\.....\...\Root
...\.....\verilog
...\.....\.......\can_testbench.v
...\.....\.......\can_testbench_defines.v
...\.....\.......\CVS
...\.....\.......\...\Entries
...\.....\.......\...\Repository
...\.....\.......\...\Root
...\.....\.......\timescale.v
...\CVS
...\...\Entries
...\...\Repository
...\...\Root
...\doc
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\src
...\...\...\CVS
...\...\...\...\Entries
...\...\...\...\Repository
...\...\...\...\Root
...\rtl
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\verilog
...\...\.......\can_acf.v
...\...\.......\can_bsp.v
...\...\.......\can_btl.v
...\...\.......\can_crc.v
...\...\.......\can_defines.v
...\...\.......\can_fifo.v
...\...\.......\can_ibo.v
...\...\.......\can_register.v
...\...\.......\can_registers.v
...\...\.......\can_register_asyn.v
...\...\.......\can_register_asyn_syn.v
...\...\.......\can_register_syn.v
...\...\.......\can_top.v
...\...\.......\CVS
...\...\.......\...\Entries
...\...\.......\...\Repository
...\...\.......\...\Root
...\...\.......\README.txt
...\sim
...\...\CVS
...\...\...\Entries
...\...\...\Repository
...\...\...\Root
...\...\rtl_sim
...\...\.......\bin
...\...\.......\...\cds.lib
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\hdl.var
...\...\.......\...\INCA_libs
...\...\.......\...\.........\CVS
...\...\.......\...\.........\...\Entries
...\...\.......\...\.........\...\Repository
...\...\.......\...\.........\...\Root
...\...\.......\...\.........\worklib
...\...\.......\...\.........\.......\CVS
...\...\.......\...\.........\.......\...\Entries
...\...\.......\...\.........\.......\...\Repository
...\...\.......\...\.........\.......\...\Root
...\...\.......\...\.........\.......\dir_keeper
...\...\.......\...\memory_file_list
...\...\.......\...\rtl_file_list
...\...\.......\...\sim_file_list
...\...\.......\CVS
...\...\.......\...\Entries
...\...\.......\...\Repository
...\...\.......\...\Root
...\...\.......\log
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\dir_keeper
...\...\.......\out
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository
...\...\.......\...\...\Root
...\...\.......\...\dir_keeper
...\...\.......\run
...\...\.......\...\clean
...\...\.......\...\CVS
...\...\.......\...\...\Entries
...\...\.......\...\...\Repository