文件名称:dmc_verilog
- 所属分类:
- 单片机(51,AVR,MSP430等)
- 资源属性:
- [PDF]
- 上传时间:
- 2012-11-26
- 文件大小:
- 617kb
- 下载次数:
- 0次
- 提 供 者:
- 沈**
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
本示例中使用了一个DCM模块,将输入时钟50MHz,倍频到100MHz,分频到25MHz,不同的频率值通过LED进行演示。-This example uses a DCM module, the input clock 50MHz, frequency-doubled to 100MHz, frequency to 25MHz, the frequency of different values demonstrated through the LED.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
xapp462.pdf
xapp462_verilog
...............\BUFG_CLK0_FB_SUBM.v
...............\BUFG_CLK0_SUBM.v
...............\BUFG_CLK2X_FB_SUBM.v
...............\BUFG_CLK2X_SUBM.v
...............\BUFG_CLKDV_SUBM.v
...............\BUFG_DFS_FB_SUBM.v
...............\BUFG_DFS_SUBM.v
...............\BUFG_PHASE_CLK0_SUBM.v
...............\BUFG_PHASE_CLK2X_SUBM.v
...............\BUFG_PHASE_CLKDV_SUBM.v
...............\BUFG_PHASE_CLKFX_FB_SUBM.v
...............\DCM_INST.v
...............\readme_dcm_verilog.txt
xapp462_verilog
...............\BUFG_CLK0_FB_SUBM.v
...............\BUFG_CLK0_SUBM.v
...............\BUFG_CLK2X_FB_SUBM.v
...............\BUFG_CLK2X_SUBM.v
...............\BUFG_CLKDV_SUBM.v
...............\BUFG_DFS_FB_SUBM.v
...............\BUFG_DFS_SUBM.v
...............\BUFG_PHASE_CLK0_SUBM.v
...............\BUFG_PHASE_CLK2X_SUBM.v
...............\BUFG_PHASE_CLKDV_SUBM.v
...............\BUFG_PHASE_CLKFX_FB_SUBM.v
...............\DCM_INST.v
...............\readme_dcm_verilog.txt