文件名称:maxbijiao
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在quaters下写的比较数的大小输出，verilog语言写的，具有状态机和存储器-Written in the quaters of the size of the comparator output, verilog language written with the state machine and memory
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下载文件列表
ss
..\data_hex4x4.txt
..\lev.v
..\max.v
..\rom_wave_out.v
..\top.cr.mti
..\top.mpf
..\top.v
..\top_tb.v
..\vsim.wlf
..\work
..\....\lev
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\max
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\rom_wave_out
..\....\............\verilog.asm
..\....\............\_primary.dat
..\....\............\_primary.vhd
..\....\top
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\top_tb
..\....\......\verilog.asm
..\....\......\_primary.dat
..\....\......\_primary.vhd
..\....\_info
..\data_hex4x4.txt
..\lev.v
..\max.v
..\rom_wave_out.v
..\top.cr.mti
..\top.mpf
..\top.v
..\top_tb.v
..\vsim.wlf
..\work
..\....\lev
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\max
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\rom_wave_out
..\....\............\verilog.asm
..\....\............\_primary.dat
..\....\............\_primary.vhd
..\....\top
..\....\...\verilog.asm
..\....\...\_primary.dat
..\....\...\_primary.vhd
..\....\top_tb
..\....\......\verilog.asm
..\....\......\_primary.dat
..\....\......\_primary.vhd
..\....\_info