文件名称:xcv
介绍说明－－下载内容均来自于网络，请自行研究使用
verilog编写的状态机检测00100序列.
实现 input:...011000010010000...
output:...000000000100100...
并且 用测试模块来验证状态是否正确工作-verilog prepared by the state machine detected 00,100 sequences. Achieve input : ... ... 011000010010000 output : 000000000100100 ... ... and test module used to verify the state is working
实现 input:...011000010010000...
output:...000000000100100...
并且 用测试模块来验证状态是否正确工作-verilog prepared by the state machine detected 00,100 sequences. Achieve input : ... ... 011000010010000 output : 000000000100100 ... ... and test module used to verify the state is working
(系统自动生成,下载前可以参看下载内容)
下载文件列表
xcv
...\test.v
...\work
...\....\xcv
...\....\...\verilog.asm
...\....\...\_primary.dat
...\....\...\_primary.vhd
...\....\xcv_@top
...\....\........\verilog.asm
...\....\........\_primary.dat
...\....\........\_primary.vhd
...\....\_info
...\xcv.v
...\test.v
...\work
...\....\xcv
...\....\...\verilog.asm
...\....\...\_primary.dat
...\....\...\_primary.vhd
...\....\xcv_@top
...\....\........\verilog.asm
...\....\........\_primary.dat
...\....\........\_primary.vhd
...\....\_info
...\xcv.v