文件名称:booth_mul
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一种可以完成16位有符号／无符号二进制数乘法的乘法器。该乘法器采用了改进的Booth算法，简化了部分积的符号扩展，采用Wallace树和超前进位加法器来进一步提高电路的运算速度。本乘法器可以作为嵌入式CPU内核的乘法单元，整个设计用VHDL语言实现。-a 16 to be completed with symbols/unsigned multiplication of the number of binary multipliers. The multiplier used to improve the Booth algorithm, simplified some of the plot symbols expansion Wallace tree and used-ahead adder circuit to further enhance the computing speed. The multiplier can be used as embedded CPU cores multiplication modules, the entire design with VHDL.
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下载文件列表
booth_mul
.........\booth_mul.v
.........\mul.cr.mti
.........\mul.mpf
.........\tb_mul.v
.........\vsim.wlf
.........\work
.........\....\booth_mul
.........\....\.........\verilog.asm
.........\....\.........\_primary.dat
.........\....\.........\_primary.vhd
.........\....\tb_mul
.........\....\......\verilog.asm
.........\....\......\_primary.dat
.........\....\......\_primary.vhd
.........\....\_info
.........\booth_mul.v
.........\mul.cr.mti
.........\mul.mpf
.........\tb_mul.v
.........\vsim.wlf
.........\work
.........\....\booth_mul
.........\....\.........\verilog.asm
.........\....\.........\_primary.dat
.........\....\.........\_primary.vhd
.........\....\tb_mul
.........\....\......\verilog.asm
.........\....\......\_primary.dat
.........\....\......\_primary.vhd
.........\....\_info