文件名称:Example-2-1

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 111kb
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  • 0次
  • 提 供 者:
  • j***
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这些是verilog的开发实例,仅供参考.实例1-These are examples of the development of Verilog, for reference purposes only. Example 1
相关搜索: fpga1
vh

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下载文件列表

Example-2-1

...........\Project_Navigator_Demo

...........\......................\counter

...........\......................\.......\.untf

...........\......................\.......\automake.log

...........\......................\.......\bitgen.ut

...........\......................\.......\coregen.log

...........\......................\.......\coregen.prj

...........\......................\.......\counter.bgn

...........\......................\.......\counter.bit

...........\......................\.......\counter.bld

...........\......................\.......\counter.cmd_log

...........\......................\.......\counter.dhp

...........\......................\.......\counter.dly

...........\......................\.......\counter.drc

...........\......................\.......\counter.lso

...........\......................\.......\counter.mrp

...........\......................\.......\counter.nc1

...........\......................\.......\counter.ncd

...........\......................\.......\counter.ngc

...........\......................\.......\counter.ngd

...........\......................\.......\counter.ngm

...........\......................\.......\counter.ngr

...........\......................\.......\counter.npl

...........\......................\.......\counter.pad

...........\......................\.......\counter.pad_txt

...........\......................\.......\counter.par

...........\......................\.......\counter.pcf

...........\......................\.......\counter.placed_ncd_tracker

...........\......................\.......\counter.prj

...........\......................\.......\counter.ptf

...........\......................\.......\counter.routed_ncd_tracker

...........\......................\.......\counter.sprj

...........\......................\.......\counter.stx

...........\......................\.......\counter.syr

...........\......................\.......\counter.tfi

...........\......................\.......\counter.twr

...........\......................\.......\counter.twx

...........\......................\.......\counter.ut

...........\......................\.......\counter.v

...........\......................\.......\counter.xpi

...........\......................\.......\counter_fpga_editor.log

...........\......................\.......\counter_ise5_bak.zip

...........\......................\.......\counter_last_par.ncd

...........\......................\.......\counter_map.ncd

...........\......................\.......\counter_map.ngm

...........\......................\.......\counter_ngdbuild.nav

...........\......................\.......\counter_pad.csv

...........\......................\.......\counter_pad.txt

...........\......................\.......\counter_vhdl.prj

...........\......................\.......\xst

...........\......................\.......\...\work

...........\......................\.......\...\....\hdllib.ref

...........\......................\.......\...\....\vlg10

...........\......................\.......\...\....\.....\counter.bin

...........\......................\.......\_ngo

...........\......................\.......\....\netlist.lst

...........\......................\.......\__projnav

...........\......................\.......\.........\bitgen.rsp

...........\......................\.......\.........\coregen.rsp

...........\......................\.......\.........\counter.gfl

...........\......................\.......\.........\counter.xst

...........\......................\.......\.........\counter._prj

...........\......................\.......\.........\counter._sprj

...........\......................\.......\.........\counter_flowplus.gfl

...........\......................\.......\.........\counter_jhdparse_tcl.rsp

...........\......................\.......\.........\counter_ncdTOut_tcl.rsp

...........\......................\.......\.........\counter_tst_Fix_jhdparse_tcl.rsp

...........\......................\.......\.........\ednTOngd_tcl.rsp

...........\......................\.......\.........\hb_cmds

...........\......................\.......\

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