文件名称:Full_Adder
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用VERILOG语言实现了全加器,可综合可仿真通过
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压缩包 : 9927403full_adder.rar 列表 Full_Adder\Full_Adder.qpf Full_Adder\Full_Adder.qsf Full_Adder\Full_Adder.map.rpt Full_Adder\Full_Adder.flow.rpt Full_Adder\Full_Adder.map.summary Full_Adder\Full_Adder.v Full_Adder\Full_Adder.map.eqn Full_Adder\Full_Adder.fit.eqn Full_Adder\Full_Adder.pin Full_Adder\Full_Adder.fit.rpt Full_Adder\Full_Adder.fit.summary Full_Adder\Full_Adder.pof Full_Adder\Full_Adder.asm.rpt Full_Adder\Full_Adder.tan.summary Full_Adder\Full_Adder.tan.rpt Full_Adder\Full_Adder.done Full_Adder\Full_Adder.vwf Full_Adder\Full_Adder.sim.rpt Full_Adder\Full_Adder.qws Full_Adder\cmp_state.ini Full_Adder\db\Full_Adder.db_info Full_Adder\db\Full_Adder_cmp.qrpt Full_Adder\db\Full_Adder.map.qmsg Full_Adder\db\Full_Adder.hif Full_Adder\db\Full_Adder.(0).cnf.cdb Full_Adder\db\Full_Adder.(0).cnf.hdb Full_Adder\db\Full_Adder.hier_info Full_Adder\db\Full_Adder.rtlv_sg.cdb Full_Adder\db\Full_Adder.rtlv.hdb Full_Adder\db\Full_Adder.rtlv_sg_swap.cdb Full_Adder\db\Full_Adder.pre_map.hdb Full_Adder\db\Full_Adder.pre_map.cdb Full_Adder\db\Full_Adder.psp Full_Adder\db\Full_Adder.sgdiff.cdb Full_Adder\db\Full_Adder.sgdiff.hdb Full_Adder\db\Full_Adder.sld_design_entry_dsc.sci Full_Adder\db\Full_Adder.syn_hier_info Full_Adder\db\Full_Adder.map.cdb Full_Adder\db\Full_Adder.map.hdb Full_Adder\db\Full_Adder.fit.qmsg Full_Adder\db\Full_Adder.asm.qmsg Full_Adder\db\Full_Adder.tan.qmsg Full_Adder\db\Full_Adder.cmp.tdb Full_Adder\db\Full_Adder.cmp0.ddb Full_Adder\db\Full_Adder.cmp.cdb Full_Adder\db\Full_Adder.cmp.hdb Full_Adder\db\Full_Adder.cmp.rdb Full_Adder\db\Full_Adder.sim.qmsg Full_Adder\db\Full_Adder.sim.hdb Full_Adder\db\Full_Adder.cmp.ddb Full_Adder\db\Full_Adder.eds_overflow Full_Adder\db\Full_Adder.sim.vwf Full_Adder\db\Full_Adder.sim.rdb Full_Adder\db\Full_Adder_sim.qrpt Full_Adder\db\Full_Adder.sld_design_entry.sci Full_Adder\db\Full_Adder.eco.cdb Full_Adder\db Full_Adder