文件名称:CLOCK_co-design_of_C_and_Verilog
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A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
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下载文件列表
压缩包 : 13898366clock_co-design_of_c_and_verilog.rar 列表 CLOCK\homework3.v CLOCK\hw3\HW3.doc CLOCK\hw3\output_use_de.c CLOCK\hw3 CLOCK\HW3.doc CLOCK\hw3testbench.v CLOCK\output_use_de.c CLOCK\~$HW3.doc CLOCK