文件名称:VerilogHDL_advanced_digital_design_code_Ch4
- 所属分类：
- 其它资源
- 资源属性：
- [WORD]
- 上传时间：
- 2008-10-13
- 文件大小：
- 21.71kb
- 下载次数：
- 0次
- 提 供 者：
- lianl******
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
Verilog HDL 高级数字设计源码 _chapter4
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 87361009veriloghdl_advanced_digital_design_code_ch4.rar 列表 VerilogHDL_advanced_digital_design_code_Ch 4\ADDVB_Models_4.doc VerilogHDL_advanced_digital_design_code_Ch 4\Add_rca_4.v VerilogHDL_advanced_digital_design_code_Ch 4\AOI_str.v VerilogHDL_advanced_digital_design_code_Ch 4\AOI_UDP.v VerilogHDL_advanced_digital_design_code_Ch 4\compare_2_str.v VerilogHDL_advanced_digital_design_code_Ch 4\compare_4_str.v VerilogHDL_advanced_digital_design_code_Ch 4\Mux_2_32_CA.v VerilogHDL_advanced_digital_design_code_Ch 4\Mux_4_32_CA.v VerilogHDL_advanced_digital_design_code_Ch 4\Mux_4_32_case.v VerilogHDL_advanced_digital_design_code_Ch 4\Mux_4_32_CA_if.v VerilogHDL_advanced_digital_design_code_Ch 4\test_hiZ.v VerilogHDL_advanced_digital_design_code_Ch 4\t_Add_full_ASIC.v VerilogHDL_advanced_digital_design_code_Ch 4\t_Add_full_unit_delay.v VerilogHDL_advanced_digital_design_code_Ch 4\t_Add_half.v VerilogHDL_advanced_digital_design_code_Ch 4\t_Add_rca_4_Unit_Delay.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\ADDVB_Models_4.doc VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\Add_rca_4.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\AOI_str.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\AOI_UDP.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\compare_2_str.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\compare_4_str.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\Mux_2_32_CA.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\Mux_4_32_CA.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\Mux_4_32_case.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\Mux_4_32_CA_if.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\test_hiZ.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\t_Add_full_ASIC.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\t_Add_full_unit_delay.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\t_Add_half.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf\t_Add_rca_4_Unit_Delay.v VerilogHDL_advanced_digital_design_code_Ch 4\_vti_cnf VerilogHDL_advanced_digital_design_code_Ch 4