文件名称:can_IPCORE
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CAN总线IPCORE，采用Verilog HDL语言实现。
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 43680548can_ipcore.rar 列表 rtl\verilog\can_acf.v rtl\verilog\can_bsp.v rtl\verilog\can_btl.v rtl\verilog\can_crc.v rtl\verilog\can_defines.v rtl\verilog\can_fifo.v rtl\verilog\can_ibo.v rtl\verilog\can_register.v rtl\verilog\can_registers.v rtl\verilog\can_register_asyn.v rtl\verilog\can_register_asyn_syn.v rtl\verilog\can_register_syn.v rtl\verilog\can_top.v rtl\verilog\README.txt rtl\verilog\CVS\Entries rtl\verilog\CVS\Repository rtl\verilog\CVS\Root bench\verilog\can_testbench.v bench\verilog\can_testbench_defines.v bench\verilog\timescale.v bench\verilog\CVS\Entries bench\verilog\CVS\Repository bench\verilog\CVS\Root rtl\verilog\CVS bench\verilog\CVS rtl\verilog bench\verilog rtl bench