文件名称:clock
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实验3设计资料简易时钟
FPGA数字时钟设计参考资料及全部代码-Experimental design simple clock FPGA digital clock design reference information and all the code
FPGA数字时钟设计参考资料及全部代码-Experimental design simple clock FPGA digital clock design reference information and all the code
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下载文件列表
实验3设计资料简易时钟\aclock.vhd
.....................\bcd_7seg.vhd
.....................\clkgen.vhd
.....................\clock.tcl
.....................\comcoun.vhd
.....................\com_encode.vhd
.....................\COUNT10a.vhd
.....................\COUNT60a.vhd
.....................\hour.vhd
.....................\mx.vhd
.....................\transcript
.....................\基于FPGA的数字时钟设计参考.doc
实验3设计资料简易时钟