文件名称:VHDL-Clock
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用VHDL语言写的时钟程序。采用模块化编程。可在EPM7128芯片上下载。编译环境可用Maxplus或Quartus。-write VHDL clock procedures. Modular programming. The EPM7128 chips download. Build environment or Quartus Maxplus available.
相关搜索: clock
vhdl
vhdl
clock
EPM7128
max
plus
2
quartus
clock
Download
maxplus
epm7128
training
board
maxplus
epm7128
Quart
vhdl
vhdl
clock
EPM7128
max
plus
2
quartus
clock
Download
maxplus
epm7128
training
board
maxplus
epm7128
Quart
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下载文件列表
VHDL-Clock
..........\contr.txt
..........\ding.txt
..........\f.cpp
..........\shan.txt
..........\six.txt
..........\ten.txt
..........\zhuanhuan.txt
..........\contr.txt
..........\ding.txt
..........\f.cpp
..........\shan.txt
..........\six.txt
..........\ten.txt
..........\zhuanhuan.txt